Article
Breaking the speed limits of phase-change memory.
Data Storage Institute, Agency for Science, Technology and Research (A*STAR), Singapore.
Science (impact factor:
31.2).
06/2012;
336(6088):1566-9.
DOI:10.1126/science.1221561
Source: PubMed
-
Citations (0)
- Cited In (1)
-
Article: Ultrafast synaptic events in a chalcogenide memristor.
[show abstract] [hide abstract]
ABSTRACT: Compact and power-efficient plastic electronic synapses are of fundamental importance to overcoming the bottlenecks of developing a neuromorphic chip. Memristor is a strong contender among the various electronic synapses in existence today. However, the speeds of synaptic events are relatively slow in most attempts at emulating synapses due to the material-related mechanism. Here we revealed the intrinsic memristance of stoichiometric crystalline Ge2Sb2Te5 that originates from the charge trapping and releasing by the defects. The device resistance states, representing synaptic weights, were precisely modulated by 30 ns potentiating/depressing electrical pulses. We demonstrated four spike-timing-dependent plasticity (STDP) forms by applying programmed pre- and postsynaptic spiking pulse pairs in different time windows ranging from 50 ms down to 500 ns, the latter of which is 10(5) times faster than the speed of STDP in human brain. This study provides new opportunities for building ultrafast neuromorphic computing systems and surpassing Von Neumann architecture.Scientific Reports 04/2013; 3:1619.
Data provided are for informational purposes only. Although carefully collected, accuracy cannot be guaranteed.
The impact factor represents a rough estimation of the journal's impact factor and does not reflect the actual
current impact factor.
Publisher conditions are provided by RoMEO. Differing provisions from the publisher's actual policy or licence
agreement may be applicable.
Keywords
Ab initio molecular dynamics simulations
amorphous-phase stability
applicable memory device
applying
capable
crystallization speed
gigahertz data-transfer rates
high-speed reversible switching
incubation-assisted increase
key challenge
leading candidates
next-generation data-storage devices
nonvolatile operations
paves
PCRAM devices
prestructural
structural origin