29. L. Liao et al., Nature 467, 305 (2010).
30. Y.-M. Lin et al., IEEE Electron Device Lett. 32, 1343 (2011).
Acknowledgments: The authors are grateful to Samsung
Advanced Institute of Technology colleague X. Li for TEM
analysis assistance and the Nano Fabrication group for process
assistance. We are also grateful to S.-H. Lee and S. Seo for
Materials and Methods
Figs. S1 to S10
14 February 2012; accepted 4 April 2012
Tailoring Electrical Transport
Across Grain Boundaries in
Adam W. Tsen,1Lola Brown,2Mark P. Levendorf,2Fereshte Ghahari,3Pinshane Y. Huang,1
Robin W. Havener,1Carlos S. Ruiz-Vargas,1David A. Muller,1,4Philip Kim,3Jiwoong Park2,4*
Graphene produced by chemical vapor deposition (CVD) is polycrystalline, and scattering of
charge carriers at grain boundaries (GBs) could degrade its performance relative to exfoliated,
single-crystal graphene. However, the electrical properties of GBs have so far been addressed
indirectly without simultaneous knowledge of their locations and structures. We present
electrical measurements on individual GBs in CVD graphene first imaged by transmission electron
microscopy. Unexpectedly, the electrical conductance improves by one order of magnitude for
GBs with better interdomain connectivity. Our study suggests that polycrystalline graphene with
good stitching may allow for uniformly high electrical performance rivaling that of exfoliated
samples, which we demonstrate using optimized growth conditions and device geometry.
numerous classes of dislocations and defects that
deposition (CVD) (2, 3) might be expected to be
nearly defect free, recent transmission electron
these films are polycrystalline. Electrical trans-
port between single-crystal domains could be af-
fected by scattering at the grain boundary (GB),
as has been shown theoretically (6–9). Although
TEM has provided a fast and accurate means to
identify and image the structure of GBs in CVD
graphene, the electrical impact of GBs has so far
been studied only indirectly in experiments. Pre-
vious work by Huang et al. detects no mea-
surable electrical resistance from GBs within
done by various groups find very weak correla-
tion between the average domain size of the
In contrast, Yu et al. and Jauregui et al. inferred
the presence of GBs from the shape of partially
resistance from their measurements (11, 12). The
ambiguity in these findings arose from a lack of
knowledge of the precise domain morphology
ost three-dimensional electronic mate-
rials produced in macroscopic quanti-
for the graphene measured. To this end, we have
devised an experimental scheme to first image
(using TEM) and then electrically address in-
dividual domains and GBs in polycrystalline
graphene. Such a capability is crucial, because
thesis form nontrivial patterns that are strongly
dependent on growth conditions and difficult to
predict a priori.
In Fig. 1A, we show false-color dark-field
under three different conditions [see supplemen-
tary materials (13)] taken in a manner similar to
to a separate graphene crystalline domain with
by using an aperture in the back-focal plane of
only a narrow range of angles by the graphene
lattice. In general, different graphene domains
produce a diffraction pattern rotated with respect
to one another, so each domain can be imaged
separately, colorized, and then combined.
In growth A, graphene was synthesized un-
der high reactant flow rates, which produced fast
growth and also small average domain size D ≈
C was further enclosed in copper foil, after Li
et al. (14), resulting in slower growths. The
latter films were terminated after only partial
surface coverage to highlight their growth
structures. In subsequent microscopy and
tinuous films, for which growth B yielded D ≈
10 mm and growth C, D ≈ 50 mm. The overall
shapes of partially grown graphene islands in
erally formed flowered islands(fig.S1).Despite
1Department of Applied Physics, Cornell University, Ithaca, NY
Cornell University, Ithaca, NY 14853, USA.3Department of
Institute at Cornell for Nanoscale Science, Cornell University,
Ithaca, NY 14853, USA.
*To whom correspondence should be addressed. E-mail:
Fig. 1. (A) Composite false-color DF-TEM images of CVD graphene produced using three different
growth conditions—A, B, and C—yielding average domain size D of 1, 10, and 50 mm, respectively,
in continuous films. (B) (Left) Schematic of specially fabricated TEM chip compatible with electron-
beam lithography and electrical measurements. (Top right) SEM image of top-gated, graphene Hall
bar device. (Bottom right) Overlaid SEM and DF-TEM images showing device crossing a single GB of
two domains from growth C. Scale bars, 1 mm.
VOL 3361 JUNE 2012
on June 2, 2012
these differences, DF-TEM shows that even a
single graphene island can contain several distinct
domains, revealing the complexities of graphene
growth inherent in even seemingly simple growth
To study the impact of individual GBs on
TEM imaging need to be done in conjunction.
However, complicated sample preparation pro-
make TEM studies currently incompatible with
other experimental schemes, such as nanofabri-
cation.Here,we describea method to electrically
address a material with nanometer resolution
after TEM characterization. In Fig. 1B (left), we
show a schematic of a specially fabricated TEM
chip (see supplementary materials and fig. S2)
that is 2.33 mm wide on each side,200 mmthick,
and fits standard TEM holders. In the center is a
fully suspended, silicon nitride (SiN) TEM win-
dow (80 by 80 mm, 20 nm thickness) with metal-
ized alignment marks. On the periphery are large
electrical leads and contacts patterned by optical
lithography. After graphene was transferred and
imaged, we selected an area of interest and used
electron-beam lithography to pattern a field-effect
transistor device with four-terminal geometry.
gests that our graphene was not damaged during
this process (fig. S3). In three separate lithogra-
the graphene,and (iii) defined a top gate. Acom-
pletedstructure is shown in the scanning electron
microscopy (SEM) image on the top right of Fig.
methods, we electrically addressed individual do-
mains and GBs in CVD graphene with ≈50-nm
accuracy. In the bottom right, we show an SEM
image of a representative device (before defining
thetop gate) overlaid witha false-color DF-TEM
single GB between two large domains. The areas
with faded colors represent graphene that was
subsequently etched away, leaving behind only
the high-contrast pattern in the center.
We first performed room-temperature trans-
port measurements on a GB from growth A (D ≈
1mm).In the upperinsetof Fig.2A,we showthe
of an individual GB. In the top panel, we plot
four-terminal sheet resistance R□versus gate
voltage for the left (L) and right (R) domains, as
taneously for the same gate voltage sweep. The
behavior that was typical for graphene with a
Dirac point at VDirac≈ 7 V. More strikingly, the
two showed nearly identical values for the en-
tire gated range. The cross-domain measurement
showed similar qualitative behavior with a com-
parable Dirac position. However, L-R exhibited
near VDirac, that we attributed to additional scat-
tering caused by the GB. Also, L-R seemed to
scale from single-domain resistivity (r□) by a con-
thedashed curve.Finally, bysubtracting theaver-
resistivity per micrometer length of the GB itself,
rGB, which we plot in the bottom panel as a
function of gate voltage. rGBexhibited a similar
gate-tunable behavior as r□: It is 4 kΩ-mm at
VDiracand decreased with doping, reaching a sat-
urated value of 0.5 kΩ-mm in the p-type regime.
The results of our measurement can be in-
terpreted to describe the presence of a GB as
simply an extension of the conductance channel
defined by an effective length l = rGB/r□. When
a device of dimensions L and W crossed a GB,
talline resistance R = r□(L/W) to R′ = r□(L/W) +
rGB/W = r□(L+l)/W. Hence, the channel length
effectively increased by l, and both the electrical
conductance and the carrier mobility were re-
duced by a factor R′/R = 1+l/L. Because R′/R
in our measurements, l was approximately con-
stant and independent of carrier density (fig. S4).
This effect, as diagrammed in the lower inset of
Fig. 2A, is a key finding of this report. In partic-
ular, the introduction and determination of l (rep-
resenting GB connectivity), along with average
domain size D, will allow tailoring of overall
electrical transport indevicesofall lengthscales.
For this particular device, we extracted a value
of l ≈ 200 nm.
analogous measurements at a GB from growth C
(D ≈ 50 mm), which we show in Fig. 2B. Here, L
Fig. 2. (A) (Top) Four-terminal
ing a single GB from growth A
(SEM/DF-TEM shown in inset; scale
bar, 1 mm) measured in left (L),
right (R), and across (L-R) domains
L by a factor of 1.4. (Bottom) Ex-
tracted gate-dependent GB resis-
tivity rGB. GB acts to increase
channel length by l ≈ 200 nm at
all gate biases. (B) Corresponding
measurement of more resistive
GB from growth C device (scale
bar,1mm).L-R scalesL by3.2;l =
1.8 mm. (C) l and rGB(at VDirac
and p-type doping) across 11
single-GB devices from growths A
and C. Overall, GBs from growth C
are an order of magnitude more
resistive. (D) (Top and middle)
Higher resolution DF-TEM images
of GBs from suspended growth A
and C samples show better stitch-
of overlapped GB often observed in
growth C. The diffraction spots and
relative aperture positions used to
form the images are shown as in-
measurements of device consisting
of GB overlapped by 325 nm show improved GB conductance. l ≈ –250 nm.
1 JUNE 2012VOL 336
on June 2, 2012
and R also showed similar gate dependences, but
L-R was considerably greater at all gate values,
signifying increased scattering at the GB. In fact,
we extracted a gate-dependent GB resistivity
(5 to 40 kΩ-mm) that was overall an order of
magnitude greater than that measured for growth
A. Nevertheless, R′/R ≈ 3.2 was again roughly
constant with gate bias, from which we deter-
the device channel itself.
We fabricated 11 graphene devices with a
single GB and performed similar measurements
(five devices from growth A and six from C). In
Fig. 2C, we plot their GB resistivities measured
both at VDiracand with p-type doping. Although
we observed a range of different values, GBs
from growth C were an order of magnitude more
resistive overall. We also plot the corresponding
gate independent l values: The mean for growth
Asampleswas 110nm,anditwas880 nmforC.
In contrast, we observe no strong correlation be-
The poorer conductance of GBs from growth
C can be explained by careful investigation of
their GB structure. Although graphene in growth
A exhibited much greater polycrystallinity, it
yielded highly uniform coverage of the under-
lying copper surface. However, for growth C,
we often observed many areas between islands
with small gaps and overlaps, suggesting a re-
duced tendency for different domains to stitch
(fig. S6). To study the morphology of individual
GBs with higher resolution, we suspended sep-
arate graphene samples from the same growths
on top of perforated SiN chips to examine with
DF-TEM. We found distinct classes of GB be-
havior from growths A and C.
In Fig. 2D (top left), we show a DF-TEM
image of a GB between two colored domains
from growth A, with their respective diffraction
spots circled in the inset. On the right, we take an
image of the entire region by selecting both spots
simultaneously and see a relatively featureless
boundary region, which is further highlighted by
the flat intensity profile taken across the bound-
ary along the marked line. Recently, Huang et al.
have imaged a particular GB of this type with
angstrom resolution and demonstrated that it can
form an atomically sharp junction locally at the
nanometer scale (4). In contrast, domains from
growth C showed a markedly different behavior,
as seen in the middle panel. Here, two domains
have physically connected, as can be seen in the
bright-field image in the inset, and showed no
slack at the boundary despite being suspended.
However, selecting the diffraction spots for both
domain orientations simultaneously revealed a
dark strip 30 nm wide where the domains join.
This result implies that this extended boundary
region had a structure different from that of the
were joined together either by graphitic material
at another orientation or by amorphous material,
although atomic resolution imaging would be
boundaries with greater crystalline discontinuity
for growth C appeared to be a general trend (fig.
S7). Additionally, we have observed growth C
domains to connect via an overlapping region.
An example is shown in the bottompanel of Fig.
2D. Again, the overlap was seen most clearly
by selecting diffraction spots from both domains
simultaneously, because the double-layered re-
gion appeared twice as intense in the dark-field
image. Here, one domain extended 65 nm on top
of the other, although overlaps as large as 1 mm
were observed for longer growths. Similar be-
using atomically resolved TEM imaging (15).
We therefore conclude that the electrical proper-
ties of GBs in CVD graphene are not universal
but are, rather, keenly sensitive to growth condi-
tions and reflect the quality of the connection
environment from growth A that yielded a faster
growth rate could also contribute to better inter-
We have also fabricated a device across two
domains from growth C that have overlapped at
their boundary, which we show in Fig. 2E. Here,
increased cross-domain resistivity, we observed
a conductance that was enhanced by a factor of
1.45, which implies an effective negative l ≈
from the overlapped graphene exclusively by re-
moving contributions from the Land R domains,
and we saw that it was an order of magnitude
greater than single-layered graphene. This result
suggests that the scattering properties in double-
so reliable synthesis of grain boundaries with
large overlap, if possible, would be an exciting
this effect to be sensitive to the length of overlap,
because a narrow overlap could still potentially
hinder interdomain transport.
To better understand the origin of GB resist-
ance for our devices with nonoverlapping do-
|VG– VDirac|/e for the two devices shown in Fig.
2, A and B, where C is the gate capacitance per
unit area. The GB from growth A was overall
an order of magnitude more conductive, as dis-
cussed previously. At low carrier concentrations
Fig. 3. (A)GBconductanceasafunctionofcarrier
are fit to a model of defect scattering from midgap
states. (B) Temperature dependence of inter- (L-R)
and intra- (R) domain resistance from growth A
Fig. 4. (A) Model of device resistance as a function of device size for growths A and C, using empirically
determined l and D. Smaller devices with 1 GB from growth C are very resistive, while growth A devices with
thestatisticallyexpected numberofGBsshowuniform highperformanceoveralargerangeofsizes.(B)(Left)
and representative color DF-TEM image (scale bar, 1 mm) of domain structure. Transport characteristics
demonstrate performance on par with exfoliated graphene. (Right) Histograms for field-effect mobility and
p-type sheet resistance of 28 similarly fabricated devices show excellent electrical behavior overall.
VOL 3361 JUNE 2012
on June 2, 2012
near the neutrality point, both values saturated
to a minimum as a result of the residual density
induced by charge inhomogeneities (16). Away
from their minima, sGBincreased slightly sub-
linearly with n. The increase of GB conductance
with doping indicates long-range scattering, be-
cause weak point disorder is insensitive to carrier
order (18) and strong disorder giving rise to mid-
gap states (19) are expected to yield conductivity
that is roughly linear with carrier density, so it is
difficult to untangle these effects a priori. How-
ever, the latter predicts increasingly sublinear
and R is the radius of the defect potential. Fitting
our data for growth C to this expression away
from the conductivity minimum, we obtained
Ld= 2.0 T 0.1 × 107cm−1, R ≈ 2 nm. By com-
than that modeled from ion-induced single-atom
vacancies reported previously (20).
Although defect scattering from GBs was
sensitive to carrier density, we expected it to be
completely insensitive to the effects of temper-
ature. In Fig. 3B, we show the intradomain (R)
and cross-domain (L-R) resistivities for another
device (growth A), taken simultaneously as a
function of temperature from 5 K to 250 K at
p-type doping. We see similar weak temperature
dependence for both measurements, which may
be the result of impurities in the graphene or on
the substrate for this particular sample (21). L-R,
however, always appears a fixed value larger
throughout, from which we extract a relatively
constant GB resistivity of 1 kΩ-mm for the entire
temperature range, consistent with our picture of
The results of our TEM and transport mea-
surements on individual GBs in CVD graphene
show that the conductance of GBs was highly
correlated with their structure. Our data also sug-
gest that it is necessary to control GB connec-
the overall electrical transport properties in poly-
crystalline graphene. For this, it is essential to
develop a systematic understanding of the com-
bined electrical effect of l (representing GB con-
nectivity) and D (domain size) under various
graphene growth conditions and device geome-
tries. Below, we present a simple model based
can be used to optimize electrical performance in
graphene devices at all length scales.
There are two necessary criteria to uphold in
order to successfully integrate CVD graphene
tant to maximize the performance of individual
ance across many devices is also highly desir-
able. Because GBs introduce inhomogeneity in
the graphene film on the length scale D, a trade-
off occurs for the above two criteria. In the limit
where device size L = W << D, graphene con-
sisting of a single domain will clearly have the
best individual performance, as device resistance
is R = r□. However, devices that cross a GB will
have R = r□(1+l/L), which could pose a hin-
drance if l is large, such as in growth C. In the
r□(1+nl/L), where n is the number of GBs
crossed. However, we expect n ≈ L/D, so all
devices will see a uniform R ≈ r□(1+l/D), which
small, such as in growth A. The plot in Fig. 4A
captures what is described here quantitatively.
Here, we calculated normalized device resistance
R/r□as a function of device size L up to 15 mm
for graphene from the two electrically charac-
The curve in black shows the result of growth C
crossing one GB using the empirically obtained
lC= 880 nm.Normalizedresistanceisvery large
at small L and decreases asymptotically to 1, the
intrinsic limit without GBs. The curve in blue
the expected number of GBs n = L/D – 1 (the
error bars indicate a T√n standard deviation from
resistance is 1 at small L and slowly increases, as
calculated by lA= 110 nm. The two curves cross
growth A sample will not severely degrade in
performance as resistance eventually saturates to
monocrystalline graphene. Similarly, device mo-
bility will approach 90% (≈1 – l/D) of that of a
single crystal. Of equal importance, such devices
show uniform performance over a large range of
lengths with less likelihood of failure for an in-
This analysis suggests that well-stitched GBs
are not the dominant scattering mechanism to
affect large-scale device transport(22) and points
to an exciting potential for the high electrical per-
formance of polycrystalline graphene. Although
the synthesis of growth C could, in principle, be
further optimized to achieve large domains to-
gether with better GB connectivity, it seems that
we can already achieve most of the performance
polycrystalline devices using our current growth
We have now demonstrated the performance
graphene devices on oxidized silicon wafers
(≈5 by 5 mm, with 100-nm SiO2top gates) using
growth A–type synthesis from a semiconductor-
grade CVD system that is thoroughly helium
leak-checked and conventional lithography with-
out the additional imaging steps of TEM. For a
particular high-performance device, we achieved
resistance of ≈1 kilohm at a relatively low carrier
par with that of supported, exfoliated graphene
(16). The use of boron nitride as a gate dielectric
could perhaps be used to further improve device
performance (23, 24). On the right, we plotted
statistics across 28 similarly fabricated devices
and saw that almost all devices had field-effect
mobilities above 10,000 cm2/Vs and resistances
polycrystalline graphene can be optimized to
have a minimal electrical impact on the overall
transport properties of the device, in accordance
with our model and findings above. We note that
our experimental techniques presented here are
not limited to the study of graphene but pave the
way for electrical studies of other newly reported
nanomaterials, such as layered, two-dimensional
inorganic compounds and their hybrids (25), to-
gether with the imaging power of TEM.
References and Notes
1. D. B. Holt, B. G. Yacobi, Extended Defects in
Semiconductors: Electronic Properties, Device Effects
and Structures (Cambridge University Press, Cambridge;
New York, 2007).
2. X. Li et al., Science 324, 1312 (2009).
3. S. Bae et al., Nat. Nanotechnol. 5, 574 (2010).
4. P. Y. Huang et al., Nature 469, 389 (2011).
5. K. Kim et al., ACS Nano 5, 2142 (2011).
6. O. V. Yazyev, S. G. Louie, Nat. Mater. 9, 806 (2010).
7. O. V. Yazyev, S. G. Louie, Phys. Rev. B 81, 195420 (2010).
8. A. Mesaros, S. Papanikolaou, C. F. J. Flipse, D. Sadri,
J. Zaanen, Phys. Rev. B 82, 205119 (2010).
9. N. M. R. Peres, F. Guinea, A. H. Castro Neto, Phys. Rev. B
73, 125411 (2006).
10. X. Li et al., Nano Lett. 10, 4328 (2010).
11. Q. Yu et al., Nat. Mater. 10, 443 (2011).
12. L. A. Jauregui, H. Cao, W. Wu, Q. Yu, Y. P. Chen,
Solid State Commun. 151, 1100 (2011).
13. Materials and methods are available as supplementary
materials on Science Online.
14. X. Li et al., J. Am. Chem. Soc. 133, 2816 (2011).
15. A. W. Robertson et al., ACS Nano 5, 6610 (2011).
16. Y. W. Tan et al., Phys. Rev. Lett. 99, 246803 (2007).
17. N. H. Shon, T. Ando, J. Phys. Soc. Jpn. 67, 2421 (1998).
18. S. Adam, E. H. Hwang, V. M. Galitski, S. Das Sarma,
Proc. Natl. Acad. Sci. U.S.A. 104, 18392 (2007).
19. T. Stauber, N. M. R. Peres, F. Guinea, Phys. Rev. B 76,
20. J.-H. Chen, W. G. Cullen, C. Jang, M. S. Fuhrer,
E. D. Williams, Phys. Rev. Lett. 102, 236805 (2009).
21. Y. W. Tan, Y. Zhang, H. L. Stormer, P. Kim, Eur. Phys. J.
Spec. Top. 148, 15 (2007).
22. G.-X. Ni et al., ACS Nano 6, 1158 (2012).
23. C. R. Dean et al., Nat. Nanotechnol. 5, 722 (2010).
24. W. Gannett et al., Appl. Phys. Lett. 98, 242105 (2011).
25. J. N. Coleman et al., Science 331, 568 (2011).
Acknowledgments: The authors thank B. Ilic and P. L. McEuen
for helpful discussions. This work was mainly supported by
Air Force Office of Scientific Research grants (FA9550-09-1-0691
and FA9550-10-1-0410) and the NSF through the Cornell
Center for Materials Research (NSF DMR-1120296). L.B. was
partially supported by a Fullbright scholarship; P.Y.H.
was supported by an NSF Graduate Research Fellowship
(DGE-0707428); R.W.H. was supported by an NSF Graduate
Research Fellowship; and C.S.R.-V. was partially supported
by Consejo Nacional de Ciencia y Tecnología Mexico. Sample
fabrication was performed at the Cornell NanoScale Science
and Technology Facility.
Materials and Methods
Figs. S1 to S7
References (26, 27)
10 January 2012; accepted 13 April 2012
1 JUNE 2012VOL 336
on June 2, 2012
Supplementary Materials for
Tailoring Electrical Transport Across Grain Boundaries
in Polycrystalline Graphene
Adam W. Tsen, Lola Brown, Mark P. Levendorf, Fereshte Ghahari, Pinshane Y. Huang,
Robin W. Havener, Carlos S. Ruiz-Vargas, David A. Muller, Philip Kim, Jiwoong Park*
*To whom correspondence should be addressed. E-mail: email@example.com
Published 1 June 2012, Science 336, 1143 (2012)
This PDF file includes:
Materials and Methods
Figs. S1 to S7
Materials and Methods
Synthesis of graphene with various domain size D:
All graphene is grown on 25 µm thick copper foil in a custom hot-wall quartz tube
furnace at ≈2 Torr pressure using the process reported by Li et al. (2).
Growth A (D ≈1 µm): Copper substrates were heated to the reaction temperature of 1000
°C in a hydrogen environment (H2: 100 sccm). After annealing for one hour, methane
(CH4: 6 sccm) was introduced. Following a 10 minute growth stage, the chamber was
slowly cooled to room temperature.
Growth B (D ≈10 µm): Copper is heated to 1050 °C in a hydrogen environment (H2:300
sccm) and annealed for 30 minutes. Methane (CH4: 0.8 sccm) is introduced for 30
minutes for partial growth (Fig. S1, top) and 90 minutes for complete coverage. The
furnace is subsequently cooled.
Growth C (D ≈50 µm): After Li et al. (14), a closed "pocket" made of copper foil was
heated between 980-1000 °C in a hydrogen environment (H2: 60-120 sccm) and annealed
up to 3 hours. Methane (CH4: 1 sccm) is introduced for 90 minutes for partial growth
(Fig. S1, bottom) and ≈3 hours for complete coverage, after which the furnace is cooled.
Fabrication of transmission electron microscopy chip compatible with electrical
Here, we describe the fabrication of transmission electron microscopy (TEM) chips that
are compatible with electron-beam lithography and electrical measurements. A completed
chip is shown in figure S2 (A). It is 2.33 mm wide on each side, 200 µm thick, and fits
standard holders. In the center is a fully suspended, silicon nitride (SiN) TEM window
(80x80 µm, 20 nm thickness) with metalized alignment marks. On the periphery are large
electrical leads and contacts. The chips are fabricated on the wafer scale using optical
lithography and cleaved individually at the end. A schematic of the process flow is shown
in figure S2 (B). First, we grow 50 nm of low stress SiN on 200 µm thick silicon (Si)
<100> wafers. In two separate lithography steps we pattern and metalize alignment marks
and electrical leads close to the TEM window (20 nm Cr/Au) as well as contact pads on
the chip periphery (150 nm Cr/Au). Next, we pattern and etch large SiN windows on the
backside of the chip using reactive ion etching (RIE) to allow for KOH etching of the Si
substrate underlying the TEM window. After transferring graphene, the SiN TEM
window is further thinned from the back to ≈20 nm with RIE.
Top: optical image of polygon graphene islands from growth B transferred onto SiO2/Si.
Bottom: optical image of flowered graphene islands from growth C on copper foil. Scale
bars: 10 µm.
Si <100>, 200 µm
CVD SiN, 50 nm
Metallizeleads/alignment marks, 20 nm
Metallizecontacts, 150 nm
RIE etch SiN backside
KOH etch Si
RIE etch SiN, ~20 nm
TEM Window (SiN, ~20 nm)
(A) Optical images of completed TEM chip compatible with e-beam lithography and
electrical measurements. (B) Schematic outlining fabrication procedure: 1) Grow 50 nm
of SiN on 200 µm thickness Si wafer. 2) Metallize electrical contacts and leads. 3) RIE
etch SiN windows on backside for 4) KOH etch of Si. After transferring graphene, 5) thin
SiN TEM window to ≈20 nm from backside with RIE.
Micro-Raman spectrum (inset) of graphene taken after dark-field TEM imaging (main
panel). Small D peak shows minimal radiation damage in contrast with (26) and (27).
Raman location is indicated by circle. Scale bar: 1 µm.
growth A GB
growth C GB
Effective length |λ| as function of hole density n = C |VG -VDirac|/e for devices shown in
Fig. 2A, B, E. λ changes only within a factor of ≈2 as n is tuned by three orders of
Intra-domain sheet resistance (L, R) measured at the Dirac point for all TEM-resolved
devices. No strong differences are seen between growths A and C.
Scanning electron micrographs of growths A (top) and C (bottom) on copper foil. Growth
A completely covers copper surface, but growth C shows many areas with gaps and
overlaps (denoted by red arrows), suggesting reduced tendency for inter-domain merging.
Zoom-in image of area between islands shows dark line and small holes on boundary
(denoted by black arrows).
Dark-field TEM images of individual grain boundaries from growths A (left) and C
(right) suspended on holes. Diffraction spots and apertures used to form images are
shown in insets. Domains from growth A almost always make seamless connections
when selecting both spots simultaneously, although dark spots (denoted by black arrows)
indicate imperfect stitching occasionally. Boundaries from growth C (denoted by gold
arrows) are always visible with varying amounts of discontinuity.
1. D. B. Holt, B. G. Yacobi, Extended Defects in Semiconductors: Electronic Properties,
Device Effects and Structures (Cambridge University Press, Cambridge; New
2. X. Li et al., Large-area synthesis of high-quality and uniform graphene films on copper
foils. Science 324, 1312 (2009). doi:10.1126/science.1171245 Medline
3. S. Bae et al., Roll-to-roll production of 30-inch graphene films for transparent
electrodes. Nat. Nanotechnol. 5, 574 (2010). doi:10.1038/nnano.2010.132
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