Conference Paper

A low power thyristor-based CMOS programmable delay element

Dept. of Electr. & Comput. Eng., Rochester Univ., NY, USA
DOI: 10.1109/ISCAS.2004.1328308 In proceeding of: Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on, Volume: 1
Source: DBLP

ABSTRACT A delay element insensitive to power supply and temperature variations becomes important as circuits speeds increase. A delay element, based on a CMOS thyristor, is proposed in this paper. This thyristor uses current rather than voltage to control the delay, exhibiting a low power supply noise, sensitivity of 94.3% and a temperature variation sensitivity of 314 PPM/°C. A technique to cancel the charge sharing effect during switching is incorporated into the delay element to further enhance power supply insensitivity. The delay element is combined with a bandgap reference voltage generator to produce a digitally controlled variable delay line. Simulation results show that the proposed delay element has lower power supply and temperature sensitivity than a classical chain of inverters. The power consumed by the proposed delay element is lower than an inverter chain, and is much lower than a differential delay element.

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