Conference Proceeding

Power MOSFET Switching Loss Analysis: A New Insight

Sch. of Electr. Eng. & Comput. Sci., Central Florida Univ., Orlando, FL
Conference Record - IAS Annual Meeting (IEEE Industry Applications Society) 11/2006; DOI:10.1109/IAS.2006.256719 pp.1438 - 1442 In proceeding of: Industry Applications Conference, 2006. 41st IAS Annual Meeting. Conference Record of the 2006 IEEE, Volume: 3
Source: IEEE Xplore

ABSTRACT Realistic estimation of power MOSFET switching losses is critical for predicting the maximum junction temperature and efficiency of power electronics circuits. The purpose of this paper is to investigate the internal physics of MOSFET switching processes using a physically based semiconductor device modeling approach, and subsequently examine the commonly used power loss calculation method based on the new physical insights. The widely accepted output capacitance loss term in this calculation method is found to be redundant and erroneous. In addition, the current method of approximating switching times with power MOSFET gate charge parameters grossly overestimates the switching power loss. This paper recommends a new MOSFET gate charge parameter specification and an effective switching time estimation method to compensate for the power loss calculation error introduced by the two slope voltage transition waveform of the power MOSFET

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Keywords

accepted output capacitance loss term
 
approximating switching times
 
based semiconductor device modeling approach
 
internal physics
 
maximum junction temperature
 
MOSFET switching processes
 
new MOSFET gate charge parameter specification
 
new physical insights
 
power electronics circuits
 
power loss calculation error
 
power MOSFET
 
power MOSFET gate charge parameters
 
power MOSFET switching losses
 
switching power loss
 
two slope voltage transition waveform
 
used power loss calculation method