Conference Proceeding

Hot-Carrier Reliability of NLDEMOS in 0.13μm SOI CMOS Technology

STMicroelectronics, Crolles
08/2006; DOI:10.1109/IPFA.2006.251002 pp.80 - 83 In proceeding of: Physical and Failure Analysis of Integrated Circuits, 2006. 13th International Symposium on the
Source: IEEE Xplore

ABSTRACT This paper presents reliability investigations in NLDEMOS transistor in 0.13μm SOI CMOS technology. Reliability tests under hot carrier injections (HCI) for different gate-lengths show two different degradation mechanisms. The modification of current path with short overlap (Olap) due to oblique equi-potential lines and the increase in the vertical electrical field under the gate edge at low V g lead to distinguish Nit interface trap generation from the source side injection

0 0
 · 
0 Bookmarks
 · 
32 Views
Data provided are for informational purposes only. Although carefully collected, accuracy cannot be guaranteed. The impact factor represents a rough estimation of the journal's impact factor and does not reflect the actual current impact factor. Publisher conditions are provided by RoMEO. Differing provisions from the publisher's actual policy or licence agreement may be applicable.

Keywords

different degradation mechanisms
 
distinguish N<sub>it</sub> interface trap generation
 
hot carrier injections
 
NLDEMOS transistor
 
paper presents reliability investigations
 
Reliability tests
 
short overlap
 
source side injection
 
vertical electrical field