Conference Paper

Very High Speed SiGe Heterojunction Bipolar Transistor Reliability Overview

DOI: 10.1109/ICCDCS.2006.250849 Conference: Devices, Circuits and Systems, Proceedings of the 6th International Caribbean Conference on
Source: IEEE Xplore


We discuss the major reliability mechanisms and the implications arising from the structural changes required for the implementation of state of the art SiGe HBT's. The current gain shift under forward and reverse device operating conditions has been characterized for 120, 200 and 350 GHz transistors. The effects of electromigration and self-heating versus fT have also been studied. In general, it should be possible to continue scaling beyond today's 350 GHz devices, with straightforward extension of the mechanisms and concerns outlined in this paper

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    ABSTRACT: High performance bipolar transistors were investigated under both reverse and forward stress conditions. Although classical hot-carrier induced degradation has been shown in reverse mode, the results obtained under forward conditions were not in line with those reported for previous device generation. Indeed, the coupled approach using low frequency noise spectra measurements and reliability studies show a relaxation of the pre-existing and/or created defects during stress. Moreover, coexistence of both classical Shockley-Read-Hall recombination and unusual trap-assisted tunnelling is clearly demonstrated and confirmed by TCAD simulations.
    Integrated Reliability Workshop Final Report, 2008. IRW 2008. IEEE International; 11/2008
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    ABSTRACT: The overall purpose of this paper is the prediction of the ultimate electrical high-frequency performance potential for SiGeC HBTs under the constraints of practical applications. This goal is achieved by utilizing advanced device simulation tools with parameters calibrated to experimental results of most advanced existing technologies. In addition, detailed electrostatic and electrothermal simulations are performed for determining the parasitic capacitances, temperature increase, and safe operating area of aggressively scaled devices. The important figures of merit are then determined from circuit simulation employing an accurate compact model incorporating all relevant physical effects. Based on the vertical profile found in Part I, this paper focuses on achieving a balanced device design by lateral scaling. It is shown that the peak values of ( f <sub>T</sub>, f <sub>max</sub>) around (1, 1.5) THz may be achievable. Such a performance limit provides still significant headroom for further developing existing processes and makes SiGeC HBTs well-suitable for highly integrated millimeter-wave applications operating within the low-end of the terahertz gap.
    IEEE Transactions on Electron Devices 12/2011; 58(11-58):3697 - 3706. DOI:10.1109/TED.2011.2163637 · 2.47 Impact Factor