Conference Proceeding

A Fully Integrated 26.5 dBm CMOS Power Amplifier for IEEE 802.11a WLAN Standard with on-chip power inductors

CEIT, San Sebastian
IEEE MTT-S International Microwave Symposium digest. IEEE MTT-S International Microwave Symposium 07/2006; DOI:10.1109/MWSYM.2006.249780 In proceeding of: Microwave Symposium Digest, 2006. IEEE MTT-S International
Source: IEEE Xplore

ABSTRACT A fully integrated power amplifier (PA) for 5 GHz 802.11a standard is implemented using a 0.18 mum CMOS process. In this paper we present the new concept of "power inductors". These on-chip inductors are implemented on the transistor drains and the output network and they can withstand the high level current signals that go through them while presenting low DC-resistance and high Q characteristics. The two stage differential power amplifier is fully integrated including the input and output networks. Measurement results show that the power amplifier achieves a power gain of 25.5 dB, 1 dB compression point (P1dB) of 20.8 dBm and power added efficiency of 26.7 %. The saturated output power is 26.5 dBm, achieving the highest reported output power among CMOS PAs for 5-GHz WLAN applications

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Keywords

0.18 mum CMOS process
 
1 dB compression point
 
5-GHz WLAN applications
 
CMOS PAs
 
integrated power amplifier
 
level current signals
 
low DC-resistance
 
new concept
 
on-chip inductors
 
output power
 
power amplifier
 
power gain
 
power inductors"
 
Q characteristics
 
saturated output power
 
two stage differential power amplifier
 

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