Conference Paper

10-channel very low noise ENG amplifier system using CMOS technology

Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK
DOI: 10.1109/ISCAS.2005.1464696 Conference: Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Source: IEEE Xplore

ABSTRACT In this paper the design, fabrication and testing of a 10-channel array of identical amplifiers suitable for velocity selective electroneurogram (ENG) recording is described. The overall gain per channel is 10,000 and the total input-referred rms noise in a bandwidth 1 Hz-5 kHz is 290 nV per channel. The active area is 12 mm2 and the power consumption is 24 mW from ±2.5 V power supplies.

0 Bookmarks
 · 
59 Views
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: The accelerating pace of research in neuroscience has created a considerable demand for neural interfacing microsystems capable of monitoring the activity of large groups of neurons. These emerging tools have revealed a tremendous potential for the advancement of knowledge in brain research and for the development of useful clinical applications. They can extract the relevant control signals directly from the brain enabling individuals with severe disabilities to communicate their intentions to other devices, like computers or various prostheses. Such microsystems are self-contained devices composed of a neural probe attached with an integrated circuit for extracting neural signals from multiple channels, and transferring the data outside the body. The greatest challenge facing development of such emerging devices into viable clinical systems involves addressing their small form factor and low-power consumption constraints, while providing superior resolution. In this paper, we survey the recent progress in the design and the implementation of multi-channel neural recording Microsystems, with particular emphasis on the design of recording and telemetry electronics. An overview of the numerous neural signal modalities is given and the existing microsystem topologies are covered. We present energy-efficient sensory circuits to retrieve weak signals from neural probes and we compare them. We cover data management and smart power scheduling approaches, and we review advances in low-power telemetry. Finally, we conclude by summarizing the remaining challenges and by highlighting the emerging trends in the field.
    Sensors 01/2011; 11(5):4572-97. · 1.95 Impact Factor
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: A nerve is an enclosed, cable-like bundle of peripheral axons. Each axon or set of axons carries neural afferent or efferent information. Many applications need to detect or record these specific nervous data inside the nerve but it is a big challenge. The main issue is to achieve a good selectivity inside the nerve without being invasive. In this context, we propose a new layout of multipolar electrode allowing a very high level of spatial selectivity. This electrode has a flat-interface electrode with an array of poles. The idea is to find the best value for the inter-pole distance and the most suitable post processing in order to both improve selectivity in the nerve and reject external parasitic signals. In this preliminary work, we put emphasis on the simulation of the action potential as a method to help the electrode specification.
    Conference proceedings: ... Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Conference 01/2009; 2009:3798-801.
  • [Show abstract] [Hide abstract]
    ABSTRACT: Parallel recording of micro-scale signals using an integrated system approach has become feasible with recent advances in technology. Practical applications include the recording of neural-signals in a brain-computer interface or in prosthetic implants. In an integrated circuit implementation the restriction in size and available power pose considerable challenges, especially in implanted devices. Furthermore, the provision of both high gain and excellent noise performance in the presence of input offset voltages are mandatory. The presented tutorial highlights design strategies for recording system optimization and compares the performance of actual system implementations with the best-case performance achievable in theory. Special consideration is given to the noise vs. power and offset-tolerance vs. noise trade-offs. An application dependent design strategy is proposed.
    Analog Integrated Circuits and Signal Processing 01/2009; 58(2):123-133. · 0.55 Impact Factor