A ferroelectric capacitor compact model for circuit simulation
Inst. of Microelectron., Tsinghua Univ., Beijing, ChinaDOI: 10.1109/ICSICT.2004.1435109 Conference: Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on, Volume: 1
Source: IEEE Xplore
A ferroelectric capacitor compact model based on physical and mathematical basis with model parameters extracted from experimental measurements is proposed. This model accounts for both main hysteresis loop and minor hysteresis loops with asymmetric nonperiodic input signals. A compact equivalent circuit of this model is described for circuit simulation. Good agreement was achieved between the measurements and simulation results over a wide range of operation.
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ABSTRACT: Improvements have been achieved to perfect the behavior model that we published before and the temperature performance can be integrated easily while the physical meaning of the parameters is clearer. Central Limit Theorem is the mathematical basis of this advanced model and the Preisach assumption is the physical basis. The simulation precision doesn't decrease.Integrated Ferroelectrics 12/2007; 95(1):199-204. DOI:10.1080/10584580701759312 · 0.36 Impact Factor
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