Conference Proceeding

The fabrication of low leakage junction with ultra shallow profile by the combination annealing of 10-ms low power and 2-ms high power FLA

Semicond. Leading Edge Technol., Tsukuba, Japan
07/2009; pp.162 - 163 In proceeding of: VLSI Technology, 2009 Symposium on
Source: IEEE Xplore

ABSTRACT We propose the suitable FLA method for pFET device activation by using flexibly-shaped-pulse FLA (FSP-FLA). For the activation annealing by FLA on B without pre-amorphous implantation (PAI) process, increase in preheat temperature before flash is the most effective. By using FSP-FLA, ~1000degC 10-ms preheat was performed. It achieves very shallow and high activated junction without PAI equivalently to that by the conventional FLA with PAI. By using the FSP-FLA without PAI, drastically reductions of the junction leakage (JL) both of p- and nFET were achieved.

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Keywords

conventional FLA
 
FLA
 
flexibly-shaped-pulse FLA
 
FSP-FLA
 
JL
 
PAI
 
PAI equivalently
 
pre-amorphous implantation
 
preheat temperature
 
shallow
 
suitable FLA method