Silica-based optical interposer for Si photonics

Abstract

An important advantage of Si photonics devices is their compactness, which derives from the high refractive index of Si. However, this compactness also causes a problem for a specific application. To solve this problem, the paper proposed an optical interposer for Si photonics. In this concept, the fan-out waveguides , which are pitch-changer waveguides, were positioned outside the Si photonics device on a silica-based waveguide. And the silica-based waveguide and Si photonics device are optically coupled via a mirror array on silica and a Si grating array, which allow vertical coupling to Si photonics devices with a wide alignment tolerance. This interposer can keep the Si photonics device small and allows us to layout a large number of chips on one wafer. In this work, we realistically expect the loss of the interposer and show its potential.

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Silica-based Optical Interposer for Si photonics

Kei Watanabe1, Arne Leinse2, Dries Van Thourhout1, Rene Heideman2 and Roel Baets1
1. Photonics Research Group, Department of Information Technology, Ghent University–IMEC, 9000 Gent, Belgium
2. LioniX BV, P.O. Box 456, 7500 AH Enschede, the Nederland

One of the important advantages of Si photonics devices is their compactness, which derives from the high
refractive index of Si [1]. However, this compactness also causes a problem for a specific application. For
example, let us consider an attachment of a 40ch fibre array to Si photonics devices. A 40ch fibre array is wider
than 10 mm (or 5 mm), because the typical pitch of standard optical fibres is fixed at 250 µm (or 127µm).
Therefore, at least one side of a Si photonics chip will be wider than a 40ch fibre array. This makes the Si
photonics footprint larger and reduces the number of chips that we can layout on one wafer.
To solve this problem, we propose an optical interposer for Si photonics. As shown in Fig. 1, in our concept
we position fan-out waveguides, which are pitch-changer waveguides, outside the Si photonics device on a
silica-based waveguide. And the silica-based waveguide and Si photonics device are optically coupled via a
mirror array on silica and a Si grating array, which allow vertical coupling to Si photonics devices with a wide
alignment tolerance [2]. This interposer can keep the Si photonics device small and allows us to layout a large
number of chips on one wafer. In this work, we realistically expect the loss of the interposer and show its
potential.
As a silica-based interposer, we have used TriplexTM, which has a pure silica core (1x1 µm) covered with a
thin Si3N4 layer [3]. This brings us low loss fibre coupling (0.4 dB/facet to high numerical aperture fibre (HNA))
and a bending radius of less than 1 mm. For the mirror array on the silica chip, we selected a total reflection
mirror consisting of an air-slit fabricated with an angled focused ion beam. For the mirror array with a fine pitch
of 25 µm we achieved a low excess loss of 1.0 dB/mirror [4].
We optimized the structures of TriplexTM and Si gratings for the interposer and calculated the coupling-loss
spectra. Figure 2 shows the predicted coupling loss of the interposer equipped with a Si photonics circuit with
optimized gratings. For comparison, we also show the coupling loss of a Si waveguide with a standard SMF. The
coupling loss of the Si photonics circuit with SMF-coupling (dotted line) is 4.3 dB with a 1 dB bandwidth of 40
nm (typical experimental values for simple gratings are of the order of 5 dB [2]). In contrast, that of the
interposer equipped with the Si photonics circuit (full line) is 4.1 dB. In an actual device, this coupling loss
should include the fibre coupling loss (0.4 dB) and the mirror loss (1.0 dB), and it becomes 5.5 dB. For more
sophisticated silicon gratings, lower loss coupling of 1.6 dB has been already realized [5] and values of the order
of 1 dB have been theoretically predicted [6] for coupling to SMF. Therefore we expect that it will be possible to
realize coupling efficiencies between the SMF and the silicon chip via the interposer in the order of 2-3 dB.

Fig. 1 Schematic of interposer for Si photonics. Fig. 2 Predicted coupling loss of interposer.
References
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