Conference Proceeding

Analytical transient response and propagation delay model for nanoscale CMOS inverter

Sch. of Electron. & Comput. Sci., Univ. of Southampton, Southampton, UK
06/2009; DOI:10.1109/ISCAS.2009.5118433 pp.2998 - 3001 In proceeding of: Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Source: IEEE Xplore

ABSTRACT This paper presents a new analytical propagation delay model for nanoscale CMOS inverters. By using a non-saturation current model, the analytical input-output transfer responses and propagation delay model are derived. The model is used for calculating inverter delays for different input transition times, load capacitances and supply voltages. Delays predicted by the proposed model are in good agreement with those of transistor level simulation results from SPICE, with accuracy of 3% or better.

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Keywords

Delays
 
different input transition times
 
good agreement
 
inverter delays
 
new analytical propagation delay model
 
non-saturation current model
 
supply voltages
 
transistor level simulation results