Trap-assisted tunneling in high permittivity gate dielectric stacks
ABSTRACT The electrical characteristics of SiO x/ ZrO 2 and SiO x/ Ta 2 O 5 gate dielectric stacks are investigated. The current–density JG in these dielectric stacks is shown to be strongly temperature dependent at low voltage (below about 2 V), the more so in the ZrO 2 stack. On the other hand, JG is much less temperature dependent at higher voltage. These results are consistent with a model which takes into account the direct tunneling of electrons across the SiO x layer and the trap-assisted tunneling of electrons through traps with energy levels below the conduction band of the high permittivity dielectric layer. The energy levels and densities of these electron trapping centers are estimated by fitting this trap-assisted tunneling model to the experimental results. © 2000 American Institute of Physics.
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ABSTRACT: We have performed an experimental study of the effects of ionizing radiation and bias-temperature stress on Si MOS devices with HfSiON gate dielectrics. We compare the responses of homogeneous high-SiN films and low-SiN films that contain crystalline HfO. We observe that the low-SiN films are more sensitive to ionizing radiation than the high-SiN films. In particular, the low-SiN film that includes crystalline HfO is especially vulnerable to electron trapping due to substrate injection under positive irradiation bias. Both film types exhibit reduced radiation-induced charge trapping relative to previous Hf silicates. The high-SiN film exhibits less radiation-induced net oxide-trap charge density than earlier Hf silicate films processed without nitride. We also find that these devices are relatively robust against bias-temperature stress instabilities. Consistent with the radiation response, the low-SiN devices also display elevated levels of charge trapping relative to the high-SiN devices during bias-temperature stress.IEEE Transactions on Nuclear Science 01/2008; · 1.45 Impact Factor
Article: Band alignment and enhanced breakdown field of simultaneously oxidized and nitrided Zr film on Si.[show abstract] [hide abstract]
ABSTRACT: ABSTRACT: The band alignment of ZrO2/interfacial layer/Si structure fabricated by simultaneous oxidation and nitridation of sputtered Zr on Si in N2O at 700°C for different durations has been established by using X-ray photoelectron spectroscopy. Valence band offset of ZrO2/Si was found to be 4.75 eV, while the highest corresponding conduction offset of ZrO2/interfacial layer was found to be 3.40 eV; owing to the combination of relatively larger bandgaps, it enhanced electrical breakdown field to 13.6 MV/cm at 10-6 A/cm2.Nanoscale Research Letters 08/2011; 6:489. · 2.73 Impact Factor
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ABSTRACT: Device characteristics of TiO 2 gate dielectrics deposited by a sol–gel method and DC sputtering method on a P-type silicon wafer are reported. Metal–oxide–semiconductor capacitors with Al as the top electrode were fabricated to study the electrical properties of TiO 2 films. The films were physically characterized by using X-ray diffraction, a capacitor voltage measurement, scanning electron microscopy, and by spectroscopy ellipsometry. The XRD and DST-TG indicate the presence of an anatase TiO 2 phase in the film. Films deposited at higher temperatures showed better crystallinity. The dielectric constant calculated using the capacitance voltage measurement was found to be 18 and 73 for sputtering and sol–gel samples respectively. The refractive indices of the films were found to be 2.16 for sputtering and 2.42 for sol–gel samples.journal of Semiconductor. 03/2012; 33(2):022001-1-4.