Conference Paper

Analysis of Bias Effects on VSWR Ruggedness in RF LDMOS for Avionics Applications

Integra Technol., Inc., El Segundo, CA
DOI: 10.1109/EMICC.2008.4772220 Conference: Microwave Integrated Circuit Conference, 2008. EuMIC 2008. European
Source: IEEE Xplore

ABSTRACT A 210 W RF LDMOS power transistor optimized for pulsed applications has been used to characterize VSWR ruggedness as a function of bias and gain compression. The ruggedness test used is the 10:1 VSWR load mismatch. The transistor, operated in class AB power amplifier, can deliver 210 W of output power when biased at 32 V (P3dB) or 36 V (P1dB), having a minimum breakdown voltage of 85 V. In both conditions the transistor passes 4:1 VSWR mismatch without degradation. We also found that when operated at 32 V and 210 W (3dB compression) the transistor passes 10:1 VSWR load mismatch without any degradation. On the contrary, when operated at 36 V (1dB compression), the transistor either goes into catastrophic failure or it survives the mismatch test with a severe power rating degradation in excess of 5%. Measured electrical data and simulated junction temperature data help explaining the different results on the VSWR ruggedness.

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