Modematching analysis of substrateintegrated waveguide circuits
ABSTRACT A modematching approach is presented for the analysis of substrateintegrated waveguide (SIW) circuits. The numerical technique takes advantage of recently developed fabrication techniques employing rectangularshaped via holes. Discontinuity models involving alldielectric waveguides and sections with arbitrary numbers of vias are presented and combined into a powerful analysis tool which can be used straightforwardly for the design of SIW components. The influence of the overall substrate width on the circuit performance is investigated. It is found that the computational domain can be significantly reduced without impacting on the computed performances. A design example involving a backtoback impedance transformer is presented. The results are verified by comparison with the commercially available field solver CST Microwave Studio.

Conference Paper: Returnloss investigation of the equivalent width of substrateintegrated waveguide circuits
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ABSTRACT: Five different models to determine the equivalent width of substrateintegrated waveguide (SIW) circuits are investigated. The reflection coefficients between alldielectric waveguides of equivalent width and SIW circuits are analyzed by fullwave techniques. It is found that one of the models yields consistently inferior results while the others depend on the ratio of the viahole diameter and the centertocenter spacing of the via holes. Moreover, the influence of the substrate's permittivity with respect to the viahole diameter and spacing is demonstrated. Recommendations are derived as to the use of respective models for different via diameters and spacings.Microwave Workshop Series on Millimeter Wave Integration Technologies (IMWS), 2011 IEEE MTTS International; 01/2011
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MODEMATCHING ANALYSIS OF SUBSTRATEINTEGRATED WAVEGUIDE CIRCUITS
Jens Bornemann and Farzaneh Taringou
Department of Electrical and Computer Engineering, University of Victoria,
Victoria, BC, V8W 3P6, Canada
ABSTRACT
A modematching approach is presented for the analysis of
substrateintegrated waveguide
numerical technique takes advantage of recently developed
fabrication techniques employing rectangularshaped via
holes. Discontinuity models
waveguides and sections with arbitrary numbers of vias are
presented and combined into a powerful analysis tool which
can be used straightforwardly for the design of SIW
components. The influence of the overall substrate width on
the circuit performance is investigated. It is found that the
computational domain can be significantly reduced without
impacting on the computed performances. A design example
involving a backtoback impedance transformer is
presented. The results are verified by comparison with the
commercially available field solver CST Microwave Studio.
Index Terms— Substrateintegrated
technology, numerical modeling,
techniques, computeraided design.
1. INTRODUCTION
Substrateintegrated waveguide (SIW) circuits form a
reasonable compromise between microstrip and waveguide
technologies [1]. Their advantages made an impact in the
lower millimeterwave frequency range [2], [3] where
microstrip components are
waveguides too bulky.
Although a large variety of different SIW components
have been presented in the recent literature, actual circuit
designs involve commercial field solvers such as Ansoft
HFSS or CST Microwave Studio. While the accuracy of
such packages is undisputed, their numerical effort in circuit
optimization is tremendous and timeconsuming. Thus other
techniques, which are more tailored to waveguidetype
modeling, have emerged. The ModeMatching Technique
(MMT) is used for dispersion analysis of SIWs [4], and the
Boundary Integral − Resonant Mode Expansion (BIRME)
method for equivalentcircuit extraction [5]. One of the
reasons for not using such techniques in the fullwave
synthesis and optimization of SIW circuits is the circular
shape of the via holes with respect to the Cartesian
coordinate system of the principle SIW discontinuities
(SIW) circuits. The
involving alldielectric
waveguide
modematching
increasingly lossy and
which form the SIW component. With the emergence of
new fabrication techniques, however, more arbitrary via
shapes become feasible [2], [6], and rectangular and square
via shapes have successfully been implemented [7].
Therefore, this paper presents a MMT approach for the
analysis and design of SIW components with square via
holes. The numerical procedure follows fundamental MMT
principles [8] and uses an alldielectric waveguide as a low
reflective SIW feed [9].
2. THEORY
Fig. 1 shows a SIW formed by ten equally spaced square via
hole pairs with equivalentwidth alldielectric waveguide
ports at both ends.
Fig. 1. Substrateintegrated waveguide with square via holes and
alldielectric waveguide ports.
In order to analyze such a circuit with a MMT
procedure, two basic discontinuities need to be solved: first,
the transition between two alldielectric waveguides of
different width (Fig. 2a) and, secondly, a number of
rectangular vias embedded in an alldielectric waveguide
(Fig. 2b).
Since the substrate height is usually much smaller than
the waveguide widths, a modal analysis based on TEm0
modes is sufficient. Following procedures in [8], the vector
potentials in regions ν=1, 0, n (n=1to N) (c.f. Fig. 2) can be
written as
a
AZ Acosx
a
−
−−
⎡
⋅−
⎣
()()
111
1
hz
1
11
?
11
?
zz
2
Fexpjk zBexpjk z
−−
?
−
?
−
−
?
−
⎧
⎨
⎩
⎫
⎬
⎭
π ⎛⎞
⎟
⎠
=+
⎜
⎝
⎤
⎦
++
∑
?
?
?
(1a)
IEEE CCECE 2011  000579
CCECE 2011 Niagara Falls, Canada
9781424497898/11/$26 ©2011 IEEE
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()()
0
hz
0
m
0
m
0
m
0
0
m
0
zm
0
m
0
zm
a
m
a
AZ A cosx
2
F expjkzB exp jkz
⎧
⎨
⎩
⎫
⎬
⎭
π⎛⎞
⎟
⎠
=+
⎜
⎝
⎡
⎣
⎤
⎦
⋅−++
∑
(1b)
()
()()
n
hz
n
k
n
kn
k
n
n
k
n
zk
n
k
n
zk
k
a
AZ A cosxx
F exp jk zB exp jk z
⎧
⎨
⎩
⎫
⎬
⎭
π
=−
⎡
⎣
⎤
⎦
⋅−++
∑
(1c)
where F and B are the forward and backward travelling
wave amplitudes, respectively; kz are the propagation
constants, A the normalization coefficients and Z the wave
impedances, given by [8]
2
2
zir
i
0
i
zii
i
a
k
c
a
i
ωμ
2
A
a h
ν
1
Z
kY
ν
ν
ν
ν
π
ν
νν
⎛⎞
⎟
⎠
ωπ
⎛
⎜
⎝
⎞
⎟
⎠
= ε −⎜
⎝
=
==
(2);
c is the speed of light and h the substrate height.
(a)
(b)
Fig. 2. Discontinuities involved in the MMT process.
Considering the magneticwall boundary conditions for
the fieldmatching process in Fig. 2a, the coupling matrix
for this discontinuity is
MDiagY J Diag
=
?
{}( )
{}
10
m
Z
−
(3a)
with
( )
J
1
1
a2
0
1
m
a2
10
1 0
−
a
a2m
a
sinx sinx dx
a22
a a
−
−
+
−
−
−
⎧
⎨
⎩
⎫
⎬
⎭
(3b)
⎧
⎨
⎩
⎫
⎬
⎭
ππ⎛⎞
⎟
⎠
⎛
⎜
⎝
⎞
⎟
⎠
=++
⎜
⎝
∫
?
?
from which the modal scattering matrix follows
straightforwardly
1
11
0
21
S
F
⎢⎥
⎣
⎣⎦
1
12
0
22
SS
S
BF
B
−−
⎡
⎢
⎤
⎥
⎡
⎢
⎢
⎣
⎤
⎥
⎥
⎡
⎢
⎤
⎥
⎦
=
⎦ (4a)
[]
1
TT
11
1
TT
2112
TT
122111
T
2212
SMMU MMU
S2 MM
⎡
⎣
UMS
SMU S
−
S
SUM S
−
−
⎡
⎣
⎤
⎦
⎡
⎣
⎤
⎦
=+−
⎤
⎦
=+=
==
=−
(4b)
where U is the unit matrix, and T means transposed.
The discontinuity in Fig. 2b involves N coupling
matrices, capturing the coupling from region 0 to each
region n (n=1 to N). However, since the number of modes in
region 0 is higher than that in region n, the columntype
coupling matrices are arranged in one large matrix with the
single right side vector holding all forward and backward
traveling wave amplitudes Fn and Bn. The individual
coupling matrices are
m
MDiagYJ
=
{}( )
{}
n0nn
k
DiagZ
(5a)
with
( )
()
nn
n
xa
n
0
n
mk
x
0n
0 n
a a
a
2m
a
k
a
J sinx sinxxdx
2
+
⎧
⎨
⎩
⎫
⎬
⎭
⎧
⎨
⎩
⎫
⎬
⎭
ππ
⎛
⎜
⎝
⎞
⎟
⎠
=+−
∫
(5b)
With all N outputport amplitudes combined in a singleport
vector, the scattering matrix of the Nfurcated waveguide
discontinuity is as in (4b). The final modal scattering matrix
of N via holes in an alldielectric waveguide (Fig. 2b)
0
11v
0L
21v
S
F
⎢⎥
⎣
⎣⎦
is obtained by cascading a single diagonal matrix containing
the transmission parameters Dn of every single region n=1 to
N up to the center location (z=L/2) of the via holes (Fig. 2b)
⎧
=
⎨
⎩
and flipping the resulting scattering matrix, i.e., cascading
the same scattering matrix but with input and output ports
interchanged.
The final overall modal scattering matrix of the
structure in Fig. 1 is then obtained by following general
procedures of cascading scattering matrices, e.g. [8].
0
12v
S
S
0L
22v
S
BF
B
⎡
⎢
⎤
⎥
⎡
⎢
⎢
⎣
⎤
⎥
⎥
⎦
⎡
⎢
⎤
⎥
⎦
=
(6)
nn
zk
L
2
DDiag expjk
⎫
⎬
⎭ (7)
⎛
⎜
⎝
⎞
⎟
⎠
−
IEEE CCECE 2011  000580
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3. RESULTS
The first step in designing a substrateintegrated waveguide
is to specify the substrate and the frequency range. For this
work, the substrate is chosen as RT Duroid 5880 with a
relative permittivity of εr=2.2 and a substrate height of
h=508μm. For the frequency range of 18 GHz to 28 GHz, a
SIW cutoff frequency of approximately 15 GHz was chosen
which, following guidelines in [10], results in circular vias
of diameters of 0.72mm and centertocenter (longitudinal)
spacings of 1.02mm. The (transverse) width of the SIW
measured between the centers of the via holes is
avia=7.28mm. The equivalent waveguide width of such an
arrangement is aequ=6.71mm according to [11]. In order to
employ the MMT procedure outlined in the previous
section, the circular vias are translated to square ones based
on the assumption that the area of the via hole be preserved.
Thus all via holes used in this work have a cross section of
0.64mm x 0.64 mm. Moreover, all examples presented
below have been obtained using all modes up to 300 GHz
for the modeling of discontinuities and modes up to 150
GHz for the combination of modal scattering matrices.
The quality of a SIW circuit and its transition to an all
dielectric waveguide of width a1=aequ (Fig. 2a) is measured
by the reflection coefficient seen into the ports. Fig. 3
depicts the performance of the circuit shown in Fig. 1.
Fig. 3. Performance of the circuit shown in Fig. 1 and comparison
between this method (solid lines) and CST (dotted lines).
The reflection coefficient is 50 dB or better, and the
results are confirmed by the commercial field solver CST
Microwave Studio. For the CST simulations, the accuracy is
set to the minimum limit of 80 dB. The agreement between
the MMT approach presented here and the CST results is
excellent and remarkable, especially considering the fact
that the two curves that are compared are both at such a low
level. This result instills confidence in the design of future
SIW components. It is worthwhile to point out that a
different computation of the equivalent waveguide width as
recently published in [12] results in a reflection level that is
10 dB higher than that shown in Fig. 3 and thus is not as
well matched to the SIW as the results obtained from [11].
Another critical point involving the computational
domain is associated with the substrate width of the via
holed section (a0 in Fig. 2). Therefore, the performance of
the circuit in Fig. 3 has been reevaluated using different
substrate widths normalized to the centertocenter SIW
width avia. The resulting performances are shown in Fig. 4. It
is observed that the outer substrate walls can be located very
closely to the via holes and that the performance is nearly
independent of their actual location. Thus the computational
domain for SIW circuit modeling can be reduced. As the
substate wall distance is increased, a limit is reached
(a0/avia=3 in Fig. 4) when fields are propagating outside of
the SIW and recombine with those in the actual SIW. Then
resonance peaks as the one observed at 24.6 GHz in Fig. 4
occur and will affect the accuracy of the MMT modeling
process. As the substrate width is further increased (not
shown here), more resonance peaks appear and make it
difficult to obtain a reliable performance evaluation of a
SIW circuit.
Fig. 4. Influence of the substrate width on the performance of the
circuit in Fig. 1.
As a design example, Fig. 5 shows the performance of a
backtoback connection of a twosection impedance
transformer in SIW technology. The transformer has been
designed using a standard Hplane waveguide transformer
synthesis routine [8]. As the exact corners and straight walls
of the waveguide model cannot exactly be reproduced by
the via holes in the SIW component, fine optimization of
transformer lengths and width becomes necessary. For this
purpose, additional vias are added at the transitions between
different waveguide widths so that the width can be
optimized without creating large spaces between via holes.
As shown in Fig. 5b, excellent agreement is observed
between the results of the MMT approach and those of CST,
thus verifying the correctness of the MMT modeling process
presented in this paper. Note that all S11 levels are below 40
dB.
IEEE CCECE 2011  000581
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(a)
(b)
Fig. 5. A backtoback twosection impedance transformer (a) and
performance comparison (b) between this method (solid lines) and
CST (dotted lines).
4. CONCLUSIONS
A modeling approach for the analysis and design of SIW
circuits is presented. The modematching procedure takes
advantage of via holes of square cross sections and captures
the modal interactions of all individual discontinuities
involved. An advantage of this technique is that the actual
substrate width can be reduced to extend just a fraction
beyond the vias which gives rise to a reduction in the overall
computational domain.
Examples include a SIW section fed by alldielectric
waveguide ports and a backtoback connection of a two
section impedance transformer. Excellent agreement with
results obtained from CST Microwave Studio verifies the
modeling process presented in this paper.
5. REFERENCES
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2003), vol. 1, pp. PIIIPX, Oct. 2003.
[2] E. Moldovan, R.G. Bosisio, and K. Wu, “Wband multiport
substrateintegrated waveguide circuits,” IEEE Trans. Microwave
Theory & Tech., vol. 54, pp. 625632, February 2006.
[3] D. Stephens, P.R. Young, and I.D. Robertson, “Millimeter
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photoimageable thickfilm technology,” IEEE Trans. Microwave
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waveguides and filters in
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