Design procedure for compact pulse transformers with rectangular pulse shape and fast rise times

Abstract

Microseconds range pulse modulators based on solid state technology often utilize a pulse transformer, since it could offer an inherent current balancing for parallel connected switches and with the turns ratio the modulator design could be adapted to the available semiconductor switch technology. In many applications as e.g. radar systems, linear accelerators or klystron/magnetron modulators a rectangular pulse shape with a fast rise time and a as small as possible overshoot is required. In reality, however, parasitic elements of the pulse transformer as leakage inductance and capacitances limit the achievable rise time and result in overshoot. Thus, the design of the pulse transformer is crucial for the modulator performance. In this paper, a step by step design procedure of a pulse transformer for rectangular pulse shape with fast rise time is presented. Different transformer topologies are compared with respect of the parasitic elements, which are then calculated analytically depending on the mechanical dimensions of the transformer. Additionally, the influence of the core material, the limited switching speed of semiconductors and the nonlinear impedance characteristic of a klystron are analyzed.

Full text

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Design Procedure for Compact Pulse Transformers
with Rectangular Pulse Shape and Fast Rise Times

D. Bortis, G. Ortiz, J.W. Kolar
Power Electronic Systems Laboratory, ETH Zurich, Switzerland

and J. Biela
Laboratory for High Power Electronic Systems, ETH Zurich, Switzerland




























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IEEE Transactions on Dielectrics and Electrical InsulationVol. 18, No. 4; August 2011 1171
1070-9878/11/$25.00 © 2011 IEEE
Figure 1. a) Typical pulse waveform; b) 20 MW pulse modulator.
Design Procedure for Compact Pulse Transformers
with Rectangular Pulse Shape and Fast Rise Times
D. Bortis, G. Ortiz, J.W. Kolar
Power Electronic Systems Laboratory, ETH Zurich, Switzerland
and J. Biela
Laboratory for High Power Electronic Systems, ETH Zurich, Switzerland
ABSTRACT
Microseconds range pulse modulators based on solid state technology often utilize a
pulse transformer, since it could offer an inherent current balancing for parallel
connected switches and with the turns ratio the modulator design could be adapted to
the available semiconductor switch technology. In many applications as e.g. radar
systems, linear accelerators or klystron/magnetron modulators a rectangular pulse
shape with a fast rise time and a as small as possible overshoot is required. In reality,
however, parasitic elements of the pulse transformer as leakage inductance and
capacitances limit the achievable rise time and result in overshoot. Thus, the design of
the pulse transformer is crucial for the modulator performance. In this paper, a step by
step design procedure of a pulse transformer for rectangular pulse shape with fast rise
time is presented. Different transformer topologies are compared with respect of the
parasitic elements, which are then calculated analytically depending on the mechanical
dimensions of the transformer. Additionally, the influence of the core material, the
limited switching speed of semiconductors and the nonlinear impedance characteristic
of a klystron are analyzed.
Index Terms - Pulse transformer, rise time, transformer topology, transformer
design, solid state modulator.
1 INTRODUCTION
IN many application areas, the required output power level
of test facilities in laboratories or in industry is rising and in
more and more applications solid state modulators deploying
for example IGBT modules, with a constantly increasing
power handling capability, are utilized. In contrast to the spark
gap switches, which can only be turned-on and have a limited
life time and switching
semiconductor switches have a limited power handling
capability, so that a parallel and/or series connection of the
switches is required. The parallel connection of the
semiconductors basically offers a more robust design due to
the better capability of the switches to handle over-currents
compared to over-voltages. In [1] it has been shown, that a
modulator based on pulse transformer is the most suitable
frequency, available fast
topology for pulses in the ?s-range, since it could offer an
semiconductors. Additionally, the turn ratio of the pulse
transformer offers a degree of freedom that allows adapting
the modulator design to the current and voltage ratings of
available switch technology.
inherent current balancing in parallel connected power
In applications like radar systems, linear accelerators or
klystronand magnetron modulators, where a nearly
rectangular pulse shape is needed, also the requirements with
respect to rise times, overshoot or voltage droop are high. In
Figure 1a the schematic waveform of a typical power
modulator’s output voltage and in b) a power modulator with
the specifications given in Table 1 are shown. Since the
transformer parasitic limit the achievable rise time and define
the resulting overshoot, the design of the transformer is
crucial. On the one hand, due to non-ideal material properties
like the limited permeability (? ? ?) or the limited maximum
flux density Bmax of the core material, the maximum voltage-
time-product respectively the minimum cut-off frequency fu of
the pulse transformer is defined.
Manuscript received on 11 October 2010, in final form 24 January 2011.

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1172 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times
Figure 2. a) IEEE standardized equivalent circuit of a pulse transformer and
b) simplified equivalent circuit during the leading edge.
shown in Figure 2b during the leading edge if n ? 1 [4].
transferred to the secondary and, hence, the ideal
transformer can be neglected. If nothing mentioned, in this
paper, also all measured impedances are referred to the
secondary. Since the pulse rise time Tr is in the range of
some 100 ns and there is - due to very small voltage-time-
product – no excitation of the core, the influence of the core
material, i.e. RFe and Lmag, can be neglected during the rise
time. Even if the core resistance RFewould be considered, it
would not have an influence on the rise time, since it is
connected in parallel to the load resistance, which in this
case is Rload= 1500 ? if referred to the secondary or Rload;pri
= 0.052 ? if referred to the primary. There, the load
resistance Rloadis much smaller than the resistance of the
On the other hand, in transformers no ideal magnetic
coupling between windings can be achieved, which results in
a certain leakage inductance L?. Additionally, parasitic
distribution and result in combination with L? in an upper cut-
capacitances are summarized in one single lumped capacitor
Cd as will be shown later.
The output voltage with an almost rectangular pulse shape,
however, exhibits a wide frequency spectrum. In order to
transfer the voltage pulse with a minimum pulse distortion,
especially during the rise time, a maximum bandwidth has to
be achieved, which means that the mentioned parasitic of the
transformer must be minimized.
Consequently, the pulse transformer is one of the key
components of pulse modulators, which mainly defines the
achievable rise time Tr and overshoot ?Vmax of the output
voltage pulse.
In this paper, a general step by step design procedure of a
pulse transformer is presented. In section 2 the influence of the
parasitic elements L? and Cd is analyzed with a standardized
be simplified, which allows to derive basic design equations
concerning rise time and overshoot of the pulse transformer.
Based on this, in section 3 different transformer topologies are
compared with respect to the fastest achievable rise time. In
order to define the mechanical dimensions, the leakage
inductance L? and the capacitance Cd are calculated
transformers with multiple cores can be used, as described in
section 5. In section 6 the influence of the core material
capacitances of the transformer define the transient voltage
off frequency fo of the transformer. Often the parasitic
pulse transformer model. During the rise time this model can
analytically in section 4. In order to achieve faster rise time,
properties like permeability ?, maximum flux density B and
experimental results.
In section 7 the influence of the limited switching speed of
semiconductors and the nonlinear impedance characteristic of
a klystron is evaluated. Experimental results of the built pulse
modulator are shown in section 8.
the core losses during pulse excitation is evaluated based on
2 PULSE TRANSFORMER'S
EQUIVALENT CIRCUIT
In literature numerous electrical equivalent circuits
considering LF and HF properties of pulse transformers
have been proposed and IEEE standardized the equivalent
circuit of pulse transformers [3] as shown in Figure 2a. In
order to simplify the analysis of the transient behavior for
operation with rectangular pulse voltages, the standardized
equivalent circuit can be reduced to the equivalent circuit
There, all impedances and the input voltage Vg are
core material, which was calculated to RFe? 4 ? on the
Therefore, the rise time and the overshoot of the output
voltage, are mainly defined by the leakage inductance L?
the primary, the output voltage vout(t) can be calculated with
the Laplace-transform as described in [4].
primary.
and the capacitance Cd. Assuming an ideal step voltage at
where the damping coefficient ? of (1) is given by
If it is assumed, that the output pulse shape is mainly
defined by the transformer characteristics,, the modulator’s
impedance Rg can be neglected. Thus, the damping
coefficient ? considering only the influence of the
transformer can be simplified to
As will be shown later, however, depending on the turns
ratio of the pulse transformer, the pulse generator’s
parasitic inductance Lgen and capacitance Cgen - resulting
from the dc-link capacitors, the switches and the
interconnections – as well as the parasitic capacitance of
the load Cdhave to be considered for the calculation of the
Table 1. Specification of the 20 MW, 5?s pulse modulator.
DC Link Voltage Vin
Output Voltage Vout
Pulse Duration Tp
Output Power Pout
Rise Time Tr
1000V
200kV
5?s
20MW
< 500ns
< 3%
1:170
Overshoot ?Vmax
Turns ratio

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IEEE Transactions on Dielectrics and Electrical InsulationVol. 18, No. 4; August 2011
vload(t) rises from 10% to 90% (cf. Figure 3). For ? = 0.75
parasitics have to be minimized in order to achieve the
fastest possible rise time. For example, to keep the rise time
if ? = 0.75.
and Cd is fixed and the maximum values for the
1173
Figure 3. Transient behavior of the normalized output voltage for different
damping coefficients ?.
overshoot and the rise time. For these cases, the input
impedance should be changed from a resistance Rgto an
impedance Zg. If the step up ratio of the pulse transformer is
high, the parasitic capacitance Cgencan be neglected, since
it is transferred to the secondary, the capacitance is divided
by n2, which is much smaller than the parasitic capacitance
of the transformer Cd or the load Cload. In Figure 3 the
transient behavior of the normalized output voltage during
b
Tt
2
?
achieve a minimum rise time Tr, the damping coefficient ?
overshoot has to be still below the maximum allowed value
(Figure 1a and Table 1).
2.1 OVERSHOOT
Figure 4. a) Picture of a pulse transformer with parallel winding and b) 2D
drawing of one leg with simplified run of the magnetic and electric field
lines.
?
is illustrated. A decreasing damping coefficient ??
tradeoff between Trand overshoot is found. Therefore, to
results in a faster rise time Tr. Starting from ? < 1 a
has to be selected as small as possible while the resulting
Considering equation (3), ? depends on L?and Cd, i. e. on
load impedance Rload. In general, Rload, for example of a
klystron, is defined by the application. Therefore, the pulse
transformer’s mechanical dimensions must be adjusted in
order to fulfill the specifications of the pulse shape.
Assuming a klystron load of Rload= 1500 ?, for a maximum
?, the ratio of leakage inductance L? and capacitance Cdis
the pulse transformer’s mechanical dimensions and on the
overshoot of 3% a damping coefficient of ? = 0.75 is
fixed by
needed (equation (3)). Consequently, with a given Rloadand
2.2 RISE TIME
In addition to the overshoot, the rise time Trof the output
voltage can be derived from equation (1). As shown in
equation (5), Tris proportional to the product of L?and Cd.
Factor T10%-90% depends on the selected damping
coefficient ?? and equals the time in which the voltage
the factor is T10%-90% = 0.365.
Since the rise time Tr is proportional to L??Cd, the
below Tr= 500 ns, L??Cdhas to be smaller than 4.75x10-14
specifications in Table I are: L? < 490 ?H, Cd < 97 pF.
2.3 DESIGN CRITERIA
In order to fulfill the requirements for the maximum
overshoot and the maximum rise time, both a given ratio of
L? to Cdand a maximum product of L? and Cdhave to be
the transformer’s primary as well as the load connected to
the secondary winding have a certain inductance Lgen /
capacitance Cload, which also have to be considered. For the
realized pulse generator a parasitic inductance of Lgen =
Since the load impedance is Rload= 1500 ?, the ratio of L?
guaranteed. In general, the pulse modulator connected to
260?H was measured. Typical capacitance values of
the considered application. This means that the leakage
inductance and the distributed capacitance of the
transformer must be small to meet the pulse specifications.
Therefore, equations (4) and (5) have to be extended to
klystrons are in the range of Cload = 40 -120 pF [18] for
3 TRANSFORMER TOPOLOGY
The ratio of L? and Cdcan be varied by the mechanical
and the lengths of the windings. The product of L? and Cd,
assumed to be approximately constant [4]. Therefore, first
the transformer topology resulting in the smallest L?Cd-
dimensions must be calculated to achieve the needed L?Cd-
In the following, the L?Cd-product of three different
L? and the capacitance Cdare calculated with the energy
dimensions of the transformer, i.e. the distances, the heights
however, is defined by the transformer topology and can be
product has to be selected. Afterwards, the mechanical
ratio.
transformer topologies is analyzed. The leakage inductance
stored in the magnetic & electric field.

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1174 D. Bortis et al.: Design Procedure for Compact Pulse Transformers with Rectangular Pulse Shape and Fast Rise Times
Finally, the L?Cd-product of the transformer topology with
Figure 5. a) Picture of a pulse transformer with cone winding and b) 2D
drawing of one leg with simplified run of the magnetic and electric field
lines.
To simplify the comparison, only the energies between
the windings are considered. Finally, for the transformer
topology with the smallest L?Cd-product a more detailed
calculation of the parasitic is presented.
3.1 PARALLEL WINDING
Due to the simple construction, the parallel winding
topology is widely used. The primary and secondary are
wound on two parallel bobbins, whose distance is defined
by the required isolation. In Figure 4a picture and 2D
drawing of the parallel winding are shown.
The leakage inductance is mainly defined by the volume
and the magnetic field strength between the bobbins
(equation (7)). According to Ampere’s law and assuming
??
in the core window is given by the primary current times
an ideal core material (? = ?), the magnetic field strength
H
the number of turns Npri?Ipriand the height of the core hk.
Using equations (7) and (9), the stored magnetic energy
Emag between the windings Wpri and Wsec can be
approximately calculated by
and the resulting leakage inductance L?,parallelis
To calculate the capacitance Cd, a linear voltage
distribution
Vpri(y) and Vsec(y) is assumed across the windings.
Therewith, the voltage difference between the primary
and secondary winding depending on the vertical position y
is ?V(y) = Vsec(y)-Vpri(y).
and Wsec, the electric field lines run approximately
horizontally (Figure 4b). Thus, the electric field E
depending on the y-position is
Due to the voltage difference between the windings Wpri
? ?
(y)
Considering equation (8), the stored energy between the
windings Wpriand Wsecand therewith the capacitance Cdare
calculated.
parallel windings is
3.2 CONE WINDING
Since the distance between the windings of the
transformer with parallel winding is constant but the
voltage is increasing linearly in y-direction, the electric
field between the windings also increases linearly. In order
to achieve a constant electric field E
between the windings dwhas to be linearly decreased for
smaller voltage differences, which results in a cone winding
[4], [19] as shown in Figure 5.
Compared to the parallel winding, the volume between
the windings and therefore also the leakage inductance L?
smaller distance between the windings Cdis increases.
To calculate the leakage inductance L? of the cone
assumed (Figure 5), which was confirmed by FEM-
? ?
(y) the distance
can be reduced by a factor of two. However, due to the
winding, again, a constant magnetic field in y-direction is
simulation as long as dw? hw.
Considering equation (7), the stored magnetic energy Emag
and the resulting leakage inductance L?,coneare
Due to the linearly increasing distance dw(y) and the
? ?
between the winding is constant and runs approximately
parallel to the x-direction (Figure 5b). Hence, the stored
electric energy (equation (8)) for a cone winding and the
capacitance Cdare
voltage distribution ?V (y) in y-direction, the electric field
E
Finally, the resulting L?Cd-product of the cone winding
is
Compared to the parallel winding, the L?Cd-product can
improvement of
13.4%.
be reduced by 25%, which results in a rise time