Conference Proceeding

A 65nm CMOS 4-element Sub-34mW/element 60GHz phased-array transceiver

Univ. of California, Berkeley, CA, USA
Digest of Technical Papers - IEEE International Solid-State Circuits Conference 03/2011; DOI:10.1109/ISSCC.2011.5746266 pp.166 - 168 In proceeding of: Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
Source: IEEE Xplore

ABSTRACT The 60GHz band has received significant attention as an enabler for multi-Gb/s wireless communication. Practical mm-Wave systems will require relatively large phased arrays in order to robustly overcome path-loss and fading issues. Despite significant progress, CMOS implementations of 60GHz phased arrays have so far been area and power hungry. This paper therefore presents a 60GHz 4-element 65nm CMOS phased-array transceiver consuming <;34mW/element (including LO synthesis and distribution) that utilizes baseband (BB) phase shifting and holistic impedance optimization.

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M. Tabesh