Exploration framework for Run-time Resource Management of embedded multi-core platforms
ABSTRACT In the context of Run-time Resource Management (RRM), several research directions are ongoing. To allow exploration, integration, and efficient collaboration of all complementary techniques, this paper presents a generic and structured framework for RRM of embedded multi-core platforms, together with the most relevant services to be supported. The main focus of this RRM is the holistic view of platform resources, the dynamic adaptation to changing context, the transparent optimization of resource usage at run time, and the Quality of user Experience (QoE) management. This RRM follows a distributed and hierarchical approach, consisting of a global resource manager as central coordinator and possibly local resource managers on each core of the platform with their own policies and mechanisms. To illustrate the exploration framework of our RRM, this paper also describes experiments performed by applying our RRM prototype on concurrent MPEG4 encoders.
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ABSTRACT: The single core processor, which has dominated for over 30 years, is now obsolete with recent trends increasing towards parallel systems, demanding a huge shift in programming techniques and practices. Moreover, we are rapidly moving towards an age where almost all programming will be targeting parallel systems. Parallel hardware is rapidly evolving, with large heterogeneous systems, typically comprising a mixture of CPUs and GPUs, becoming the mainstream. Additionally, with this increasing heterogeneity comes increasing complexity: not only does the programmer have to worry about where and how to express the parallelism, they must also express an efficient mapping of resources to the available system. This generally requires in-depth expert knowledge that most application programmers do not have. In this paper we describe a new technique that derives, automatically, optimal mappings for an application onto a heterogeneous architecture, using a Monte Carlo Tree Search algorithm. Our technique exploits high-level design patterns, targeting a set of well-specified parallel skeletons. We demonstrate that our MCTS on a convolution example obtained speedups that are within 5% of the speedups achieved by a hand-tuned version of the same application.Evolutionary Computation (CEC), 2013 IEEE Congress on; 01/2013
- IEEE Congress on Evolutionary Computing; 05/2013
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ABSTRACT: The reliance on multi/many-core systems to satisfy the high performance requirement of complex embedded software applications is increasing. This necessitates the need to realize efficient mapping methodologies for such complex computing platforms. This paper provides an extensive survey and categorization of state-of-the-art mapping methodologies and highlights the emerging trends for multi/many-core systems. The methodologies aim at optimizing system's resource usage, performance, power consumption, temperature distribution and reliability for varying application models. The methodologies perform design-time and run-time optimization for static and dynamic workload scenarios, respectively. These optimizations are necessary to fulfill the end-user demands. Comparison of the methodologies based on their optimization aim has been provided. The trend followed by the methodologies and open research challenges have also been discussed.Proceedings of the 50th Annual Design Automation Conference; 05/2013