2972IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, JULY 2011
ZVS Resonant Converter With Parallel–Series
Bor-Ren Lin, Senior Member, IEEE, and Jia-Yu Dong
Abstract—A new series resonant converter with a parallel–
series transformer connection is proposed in order to achieve
zero voltage switching (ZVS) for all power switching, zero cur-
rent switching (ZCS) for rectifier diodes at a full load, and less
transformer secondary winding with a full-wave rectifier. For
high-output-voltage applications, the primary windings of two
transformers are connected in parallel in order to share the input
current and reduce the root-mean-square rms current on the
primary windings such that the copper losses on the transformers
are reduced. The secondary windings of the two transformers
are connected in series in order to ensure that the primary side
currents are balanced and the secondary winding turns are also
reduced. Thus, the sizes of the transformer core and bobbin are
reduced. The full-wave diode rectifier is used on the output side.
Thus, the voltage stress of the rectifier diode is equal to the output
voltage rather than being two times the output voltage as that in
a center-tapped rectifier topology. Based on the resonant behavior,
all switches are turned on at the ZVS, and the rectifier diodes are
turned off at the ZCS if the operating switching frequency is less
than the series resonant frequency. The laboratory experiments
with a 660-W prototype, verifying the effectiveness of the proposed
converter, are described.
Index Terms—Resonant converter, zero voltage switching
Protection Agency and the Climate Savers Computing Initia-
tive have proposed efficiency requirements for modern power
supply units. Power converters featuring zero voltage switching
(ZVS), such as asymmetric half-bridge converters , ,
active-clamping converters –, and phase-shift pulsewidth
modulation converters –, have been proposed to reduce
the switching losses of MOSFETs. However, the ZVS effect
of these techniques is limited to specific input voltage ranges
or load conditions. Thus, it is difficult to design soft switching
converters withwideload ranges.The resonantconverters in
and  have been proposed with advantages, including high-
frequency operation, ZVS or zero current switching (ZCS), and
N ORDER TO help mitigate the climate change and en-
vironmental pollution resulting from greenhouse gas emis-
Manuscript received January 1, 2010; revised April 23, 2010, May 25,
2010 and August 6, 2010; accepted September 9, 2010. Date of publi-
cation September 20, 2010; date of current version June 15, 2011. This
work was supported by the National Science Council, Taiwan, under Grant
The authors are with the Department of Electrical Engineering, National
Yunlin University of Science and Technology, Yunlin 640, Taiwan (e-mail:
Color versions of one or more of the figures in this paper are available online
Digital Object Identifier 10.1109/TIE.2010.2077612
high circuit efficiency. In a series resonant converter, the output
voltage cannot be properly regulated at a no-load condition due
to the limited voltage gain. Attention has been drawn to LLC
series resonant converters due to their essential advantages of
high conversion efficiency and high power density –.
A half-bridge or full-bridge converter is usually adopted at
the primary side in order to realize the ZVS turn-on for all
power switches, without any auxiliary circuit. If the operating
switching frequency is lower than the series resonant frequency,
the rectifier diodes can be operated at the ZCS turn-off. As
a result, the reverse recovery losses for the diode rectifier are
A resonant converter with two transformers and a full-wave
diode rectifier is proposed in order to realize the soft switching
for all semiconductors with wide input voltage and load range.
Since the input impedance of the resonant tank is from an in-
ductive load at the operating switching frequency, the resonant
current lags the fundamental input voltage applied to the reso-
nant network. Thus, the power switches can be turned on at the
ZVS. If the operating switching frequency is less than the series
resonant frequency, the rectifier diodes can be turned off at the
ZCS with wide input voltage ranges. Thus, the switching losses
for the power switches and the reverse recovery problem for
the rectifier diodes can be reduced. Two transformers are used
to reduce the size of the magnetic core and lessen the current
stress on the primary windings. The secondary windings of the
two transformers are connected in series in order to balance the
transformer primary currents and to share the input current. In
a conventional LLC resonant converter with a center-tapped
rectifier, the voltage stress of the rectifier diodes is greater than
two times the output voltage. Thus, a full-wave diode rectifier is
used in the adopted circuit to decrease the diode voltage stress.
the proposed converter are presented in detail. The experiments
based on a 660-W prototype to verify the effectiveness of the
proposed converter are described.
II. CIRCUIT CONFIGURATION
Fig. 1 gives the circuit configuration of the proposed
converter. Compared to asymmetric half-bridge converters and
active-clamp converters, the adopted converter can achieve
a ZVS turn-on for the switches and a ZCS turnoff for the
rectifier diodes with wide ranges of load conditions and input
voltages. Thus, the switching losses on power semiconductors
are reduced. A frequency modulation technique is used to
regulate the output terminal voltage. In the proposed circuit
configuration, Vin and Vo are input and output terminal
0278-0046/$26.00 © 2010 IEEE
LIN AND DONG: ZVS RESONANT CONVERTER WITH PARALLEL–SERIES TRANSFORMER CONNECTION2973
Fig. 1. Proposed LLC series resonant converter.
Fig. 2. Key waveforms of the proposed converter.
voltages, respectively; switches Q1 and Q2 make up a half-
bridge network; Cr, Lr, Lm1, and Lm2make up a resonant
tank; T1and T2are isolated transformers; D1−D4are rectifier
diodes; Coss1 and Coss2 are output capacitances of Q1 and
Q2, respectively; and Co is the output capacitance. In a
conventional center-tapped rectifier topology, the voltage
stress of the rectifier diode is two times the output voltage.
For high-output-voltage applications where Vo= 390 V, the
voltage stress of the rectifier diodes can be greater than 800 V.
A full-wave diode rectifier is used in the proposed converter to
reduce the secondary winding set and to decrease the voltage
stress of the rectifier diodes. Normally, 600-V fast recovery
diodes can be used in the proposed converter. The proposed
converter can be used in dc/dc applications with low-input and
high-output voltages, such as a battery-based dc/dc converter,
a high-power discharger system, and a dc/dc converter in a
renewable energy system.
III. OPERATION PRINCIPLE
A frequency modulation technique with a 50% duty ratio for
each power switch is used to regulate the output voltage. In
order to simplify the system analysis, we assumed that trans-
formers T1and T2are identical with the same magnetizing in-
ductances (Lm= Lm1= Lm2) and turn ratio n = np/ns. The
capacitances are such that Coss1= Coss2= Coss. Based on the
ON/OFF-states of Q1−Q2and D1−D4, the proposed converter
has six operating modes in a switching cycle. Figs. 2 and 3
show the main key waveforms and the topological equivalent
(c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6.
Operation modes of the proposed converter. (a) Mode 1. (b) Mode 2.
circuits in a switching cycle, respectively. Before time t0, Q2
is conducting, and all the diodes are off. The inductor current
iLrand magnetizing currents iLm1and iLm2are all decreasing.
The six operating modes in a switching cycle are discussed in
the following paragraphs.
Mode 1 [t0≤ t < t1]: At time t0, switch Q2is turned off and
diodes D1and D4are conducting in this mode. Primary
voltage vLm1= vLm2= nVo/2. Magnetizing currents
2974IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, JULY 2011
iLm1and iLm2increase with a slope of nVo/(2Lm) in this
mode. Coss1, Coss2, Cr, and Lrare resonant in this mode.
Since iLr(t0) is negative, inductor current iLr charges
capacitor Coss2and discharges capacitor Coss1. Since ca-
pacitances Coss1and Coss2are much less than capacitance
Cr, capacitor voltages vCoss1(or vQ1,ds) and vCoss2(or
vQ2,ds) are approximately expressed as
Diode currents iD1and iD4are given as
(t − t0)
(t − t0).
iD1(t)=iD4(t)=n[iT1(t) − iLm1(t)]=n[iT2(t) − iLm2(t)].
At time t1, capacitor voltage vCoss2= Vinand capacitor
voltage vCoss1= 0. Then, the antiparallel diode of switch
Q1is conducting since iLr(t1) is negative.
Mode 2 [t1≤ t < t2]: At time t1, the antiparallel diode of
switch Q1 is conducting. Before switch current iQ1 is
positive, Q1must be turned on to realize the ZVS. In the
secondary side, rectifier diodes D1 and D4 are forward
biased so that diodes D1 and D4 are conducting. The
primary winding voltages of transformers T1and T2are
clamped to nVo/2. Magnetizing currents iLm1and iLm2
increase linearly with the slope of nVo/(2Lm). Lr and
Cr are resonant with applied voltage Vin− nVo/2. The
resonant frequency in this mode is derived as
The resonant inductor current and capacitor voltage
are expressed as
iLr(t) =Vin− nVo/2 − vCr(t1)
+ iLr(t1)cosωr(t − t1)
vCr(t) =Vin− nVo/2 − [Vin− nVo/2 − vCr(t1)]
× cosωr(t − t1) + iLr(t1)Zrsinωr(t − t1) (6)
where Zr=?Lr/Cr and ωr= 1/2π√LrCr. Inductor
from input terminal voltage Vinto the output load through
Q1, Cr, Lr, T1, T2, D1, and D4. This mode ends at time
t2when iLm1+ iLm2= iLr. Then, the rectifier diodes D1
and D4turn off.
Mode 3 [t2≤ t < t3]: This mode starts at t2 when iLm1+
iLm2= iLr. Then, all rectifier diodes D1−D4 are off.
Only switch Q1is on. Cr, Lr, Lm1, and Lm2are resonant
in this mode. Inductor current iLr and capacitor voltage
vCrin this mode are expressed as
iLr(t) =Vin− vCr(t2)
+ iLr(t2)cosωp(t − t2)
vCr(t) =Vin− [Vin− vCr(t2)]cosωp(t − t2)
+ iLr(t2)Zpsinωp(t − t2)
sinωr(t − t1)
current iLrincreases in this interval. Power is transferred
sinωp(t − t2)
1/(2π?Cr(Lr+ Lm/2). This mode ends at time t3
Mode 4 [t3≤ t < t4]: At time t4, Q1turns off and diodes D2
and D3are conducting. The magnetizing voltages vLm1
and vLm2 are clamped to −nVo/2, and the magnetiz-
ing currents iLm1 and iLm2 decrease with the slope of
−nVo/(2Lm) in this mode. Since inductor current iLr
at time t3is positive, inductor current iLrcharges Coss1
and discharges Coss2. If the energy stored in Lris greater
than the energy stored in Coss1and Coss2, then capacitor
Coss2can be discharged to zero voltage. Since Coss1and
Coss2? Cr, the drain-to-source voltages of Q1and Q2are
when switch Q1is turned off.
(t − t3)
(t − t3).
Diode currents iD2and iD3are given as
iD2(t) = iD3(t) = n[iLm1(t) − iLr(t)].
At time t4, capacitor voltage vQ2,ds decreases to zero.
Then, the antiparallel diode of switch Q2is forward biased
and turns on.
Mode 5 [t4≤ t < t5]: At time t4, the antiparallel diode of
switch Q2is conducting. Before switch current iQ2is posi-
tive, Q2must be turned on to realize the ZVS. Since diodes
D2 and D3 are conducting in this mode, magnetizing
voltage vLm1= vLm2= −nVo/2. Magnetizing currents
iLm1and iLm2decrease with the slope of −nVo/(2Lm).
Lr and Cr are resonant in this mode. Inductor current
iLr and capacitor voltage vCr in this interval are ex-
iLr(t) =nVo/2 − vCr(t4)
sinω(t − t4)
+ iLr(t4)cosω(t − t4)
vCr(t) =nVo/2 − [nVo/2 − vCr(t4)]cosω(t − t4)
+ iLr(t4)Zrsinω(t − t4).
Inductor current iLr and capacitor voltage vCr both de-
crease in this mode. The energy stored in Lr and Cr is
transferred to the output load through Q2, Cr, Lr, T1,
T2, D2, and D3. This mode ends at time t5when iLm1+
iLm2= iLr. Diodes D2and D3turn off.
Mode 6 [t5≤ t < t0]: This mode starts at t5 when iLm1+
iLm2= iLr. Thus, the secondary winding currents iT1,s=
0. Rectifier diodes D1−D4are all off. Since Q2is still
conducting, Cr, Lr, Lm1, and Lm2 are resonant in this
LIN AND DONG: ZVS RESONANT CONVERTER WITH PARALLEL–SERIES TRANSFORMER CONNECTION2975
fundamental switching frequency.
Proposed converter. (a) Equivalent circuit. (b) Resonant tank with
mode. Inductor current iLrand capacitor voltage vCrin
this mode are expressed as
iLr(t) = −vCr(t5)
sinωp(t − t5) + iLr(t5)cosωp(t − t5)
vCr(t) =vCr(t5)cosωp(t − t5) + iLr(t5)Zpsinωp(t − t5).
This mode ends at time t0when switch Q2is turned off.
Then, the operating modes of the proposed converter in one
switching cycle are completed.
IV. SYSTEM ANALYSIS
The system analysis of the proposed converter is based
on a fundamental harmonic approach with variable switching
frequency. Thus, the approximate voltage conversion ratio of
the adopted converter can be derived. The power transfer from
the input terminal to the output load through the resonant tank is
related to the fundamental switching frequency. Therefore, all
of the harmonics of the switching frequency are neglected. The
equivalent circuit of the proposed resonant converter is shown
in Fig. 4(a). Since the duty ratio of Q1and Q2is 0.5, the input
voltage to the resonant tank is a square waveform between zero
and Vin. Based on Fourier series analysis, the input voltage
vQ2,dscan be given as
iLr,f=√2ILr,fsin(2πfst − φ)
where ILr1,fand ϕ are the rms value and phase shift of funda-
mental input current iLr1,f. The output side of the proposed
converter is driven by a quasi-sinusoidal current. When in-
ductor current iLr> iLm1+ iLm2, rectifier diodes D1and D4
are conducting, and vLm1= vLm2= nVo/2. If iLr< iLm1+
iLm2, then vLm1= vLm2= −nVo/2 and rectifier diodes D2
and D3are conducting. Since the time intervals in modes 1, 3,
4, and 6 are much less than the time intervals in modes 2 and
5, the transformer primary voltage is a quasi-square waveform
and can be expressed as
sin(2πmfst − θm)
where θmis the phase angle of the mth harmonic frequency.
The peak value of the fundamental primary voltage is derived
as ˆ vLm,f= 2nVo/π. Since the average current of the full-wave
diode rectifier is equal to the load current, the peak value of the
transformer secondary current is obtained as
Thus, the load resistance Roreflected to the transformer pri-
mary side is given as
Rac1= Rac2=ˆ vLm1,f
Therefore, the ac resonant tank shown in Fig. 4(b) is excited
by an effectively sinusoidal input voltage vQ2,f and drives
the effective resistive road Rac. The ac voltage gain of the
equivalent resonant tank related to the switching frequency is
1 + k
where k = 2Lr/Lm, Q = (2Zo/Rac) = (2?Lr/Cr/Rac),
wecanobtainQ = 0.Theac voltage gain atano-load condition
and at fs= ∞ can be obtained as
and fr= (1/2π√LrCr). At a no-load condition (Rac= ∞),
(1 + k).
If the design minimum voltage gain at the maximum input
voltage case is greater than the ac voltage gain at the no-load
condition in (23), the output voltage of the proposed converter
can be regulated
(1 + k)
where Vfis the voltage drop across rectifier diodes D1−D4.
V. DESIGN EXAMPLE AND EXPERIMENTAL RESULTS
The proposed converter was implemented with the follow-
ing specifications: Vin= 40−56 V, Vo= 390 V, Po,rated=
660 W, series resonant frequency fr= 130 kHz, and the
2976 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, JULY 2011
minimum switching frequency is 60 kHz. The TDK EER-42
magnetic core with Ae= 1.94 cm2is used to design the
isolated transformer. First, we assumed that the minimum dc
voltage gain Gdc,minat the maximum input voltage is unity.
Thus, the theoretical turn ratio of transformers T1and T2is
56 × 1
(390 + 2 × 1.7)= 0.1423.
The TDK EER-42 magnetic core with Ae= 1.94 cm2was
adopted to design transformers T1and T2. We assumed that the
working flux density ΔB = 0.4T. The minimum primary turns
can be obtained as
0.1423 × (390 + 2 × 1.7)
4 × 60000 × 0.4 × 1.94 × 10−4
The actual primary and secondary turns used in the prototype
circuit are np= 4 T and ns= 29 T, and the actual turn ratio
of the transformers is n = 4/29 = 0.138. Thus, the actual
minimum and maximum voltage gains are obtained as
=(390 + 2 × 1.7) × 0.138
=(390 + 2 × 1.7) × 0.138
From (21), the ac equivalent resistance Racat a full load is
π2Ro,rated=4 × 0.1382
1.7≈ 1.77 Ω.
We select k = 2Lr/Lm= 1/7. Based on (22), the ac gain
curves of the proposed converter with different Q’s and fre-
quency ratios F at k = 1/7 are shown in Fig. 5. From these
curves, we observe that the output voltage can be regulated if
the quality factor Q is less than 0.3 at a full load. Thus, Q = 0.3
is selected in the proposed converter at a full-load condition.
From (23), the no-load gain is given as
(1 + 1/7)≈ 0.875 < Gdc,min= 0.97.
Since the selected series resonant frequency fris 130 kHz, we
can obtain the required series inductance
0.3 × 1.77
4π × 130000≈ 0.325 μH.
40 V and Vin, max= 56 V.
Typical ac gain curves of proposed resonant converter with Vin,min=
We select Lr= 0.33 μH in the prototype circuit. Inductance
Lr is implemented with three 1-μH inductors connected in
parallel. Since we select k = 2Lr/Lm= 1/7, the magnetizing
inductances of T1and T2can be obtained as
Lm= 2Lr/k =2 × 0.33 μH
≈ 4.62 μH.
The series resonant capacitance Cris given as
4π2× 0.33 × 10−6× (130000)2
The actual series resonant capacitance Cr in the prototype
circuit is 4.4 μF. Thus, the actual series resonant frequency
is fr= 1/2π√LrCr= 106/2π√0.33 × 4.4 ≈ 132 kHz. The
rms current of capacitor Cris obtained from the magnetizing
current and the secondary winding current reflected to the pri-
mary side. Thus, the rms current and voltage stress of resonant
capacitor Crare derived as
LIN AND DONG: ZVS RESONANT CONVERTER WITH PARALLEL–SERIES TRANSFORMER CONNECTION2977
Fig. 6.Laboratory prototype circuit of the proposed converter.
The voltage stress, rms current, and average current of rectifier
diodes D1−D4are given as
vD,max=Vo+ Vf= 390 + 1.7 = 391.7 V(36)
iD,rms=πIo,max/4 = 3.14159 × 1.7/4 ≈ 1.34 A (37)
iD,av=Io/2 = 1.7/2 = 0.85 A.
Thus, the BR506 fast recovery diodes with a 600-V voltage
stress, a 5-A current stress, and a 1.7-V voltage drop are used
in the proposed circuit. The voltage stress and rms current of
power switches Q1and Q2are given as
vQ,max=Vin,max= 56 V
iQ,rms=iCr,rms/√2 = 27.82/√2 ≈ 19.67 A.
The IRFP150N∗4 MOSFETs with a 100-V voltage stress and
a 42-A current stress are used in the proposed circuit. The
circuit parameters of the laboratory prototype with a 660-W
rated power have been derived in this section and shown in
Experimental results based on a 600-W laboratory prototype
were implemented to verify the effectiveness of the proposed
converter. The input terminal voltage is Vin= 48 V. Fig. 7
shows the gate voltage and drain voltage of switches Q1and
Q2 at 100%, 60%, and 30% of the full-load condition. Be-
fore switches Q1and Q2are turned on, the drain voltage is
decreased to zero. Thus, switches Q1 and Q2 are turned on
at the ZVS. We can also observe that the operating switching
frequencies of the proposed converter are 98, 125, and 150 kHz
at 100%, 60%, and 30% full-load conditions, respectively.
Since the operating switching frequency is less than the series
resonant frequency (130 kHz) at 100% and 60% full-load
conditions, we can expect that the output diodes can be turned
off at the ZCS for the 100% and 60% load conditions. Fig. 8
shows the measured waveforms of gate voltage vQ1,gs, inductor
current iLr, and transformer primary currents iT1and iT2at
the full-load condition. When switch Q1 is on, the inductor
current iLrincreases. The transformer primary currents iT1and
iT2are balanced. Fig. 9 illustrates the measured waveforms of
gate voltage vQ1,gs and diode currents iD1−iD4 at the full-
load condition. When switch Q1 is on, diodes D1 and D4
are conducting. If switch Q1 is off, diodes D2 and D3 are
conducting. Before switch Q1is turned off, the rectifier diodes
D1 and D4 have been decreased to zero. Thus, diodes D1
and D4are both turned off at the ZCS. Therefore, no reverse
recovery currents of D1and D4will flow into Q2when Q2
is turned on. Similarly, diodes D2 and D3 are also turned
(a) 100%, (b) 60%, and (c) 30% full-load conditions.
Measured gate voltage and drain voltage of switches Q1and Q2at
off at the ZCS before switch Q2is turned off. Likewise, the
measured waveforms of the primary and secondary currents
of the proposed converter at a 60% load condition are given
2978 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, JULY 2011
iLr, and transformer primary currents iT1and iT2at full-load condition.
Measured waveforms of gate voltage vQ,gs, resonant inductor current
rents iD1−iD4at full-load condition.
in Figs. 10 and 11, respectively. We can observe that the
transformer primary currents are balanced and the output diode
currents are also turned off at the ZCS. The measured results
shown in Figs. 7–11 are close to the theoretical waveforms of
the proposed converter. Fig. 12 shows the measured efficiencies
of the proposed converter and the conventional LLC resonant
converter for different load conditions.
Measured waveforms of gate voltage vQ,gsand rectifier diode cur-
The proposed resonant converter which combines two trans-
formers in a parallel series connection in the primary and
secondary sides and a full-wave diode rectifier can achieve
features, including input current sharing, low voltage stresses
on rectifier diodes, ZVS turn-on for all power switches, and
ZCS turn-off for rectifier diodes with wide input voltage range
and load condition. Thus, the switching losses on the power
switches are reduced, and the reverse recovery current on the
rectifier diodes is overcome. The full-wave diode rectifier is
used in the high voltage side to clamp the voltage stress of
current iLr, and transformer primary currents iT1and iT2at 60% full-load
Measured waveforms of gate voltage vQ,gs, resonant inductor
currents iD1−iD4at 60% full-load condition.
Measured waveforms of gate voltage vQ,gs and rectifier diode
Measured efficiencies of the proposed converter for different load
the diodes at the output terminal voltage instead of two times
the output voltage in a conventional center-tapped rectifier. The
fundamental harmonic analysis method is adopted to derive the
LIN AND DONG: ZVS RESONANT CONVERTER WITH PARALLEL–SERIES TRANSFORMER CONNECTION2979 Download full-text
voltage conversion ratio. Thus, the proposed converter can be
used for battery stack power conversion systems such as the
uninterruptible power system or renewable energy conversion
systems. Finally, the experiments verifying the effectiveness of
the converter are described.
 J. C. P. Liu, N. K. Poon, B. M. H. Pong, and C. K. Tse, “Low output ripple
dc–dc converter based on an overlapping dual asymmetric half-bridge
topology,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1956–1963,
 B.-R. Lin and C.-H. Tseng, “Analysis of parallel-connected asymmetrical
soft-switching converter,” IEEE Trans. Ind. Electron., vol. 54, no. 3,
pp. 1642–1653, May 2008.
 P. Das, B. Laan, S. A. Mousavi, and G. Moschopoulos, “A nonisolated
bidirectional ZVS-PWM active clamped dc–dc converter,” IEEE Trans.
Power Electron., vol. 24, no. 2, pp. 553–558, Feb. 2009.
 J.-J. Lee and B.-H. Kwon, “Active-clamped ripple-free dc/dc converter
using an input–output coupled inductor,” IEEE Trans. Ind. Electron.,
vol. 55, no. 4, pp. 1842–1854, Apr. 2008.
 B.-R. Lin and C.-L. Huang, “Analysis and implementation of a novel soft-
switching pulse-width modulation converter,” IET Power Electron., vol. 2,
no. 1, pp. 90–101, Jan. 2009.
 G. B. Koo, G. W. Moon, and M. J. Youn, “New zero-voltage-switching
phase-shift full-bridge converter with low conduction losses,” IEEE
Trans. Ind. Electron., vol. 52, no. 1, pp. 28–235, Jan. 2005.
 B. R. Lin, K. Huang, and D. Wang, “Analysis and implementation of
full-bridge converter with current doubler rectifier,” Proc. Inst. Elect.
Eng.—Elect. Power Appl., vol. 152, no. 5, pp. 1193–1202, Sep. 2005.
 R. Steigerwald, “A comparison of half bridge resonant converter
topologies,” in Conf. Rec. IEEE IAS Annu. Meeting, 1987, pp. 135–144.
 A. K. S. Bhat, “Analysis and design of a modified series resonant
converter,” IEEE Trans. Power Electron., vol. 8, no. 5, pp. 423–430,
 X. Xie, J. Zhang, Z. Chen, Z. Zhao, and Z. Qian, “Analysis and opti-
mization of LLC resonant converter with a novel over-current protec-
tion circuit,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 435–443,
 K. H. Yi and G. W. Moon, “Novel two-phase interleaved LLC series-
resonant converter using a phase of the resonant capacitor,” IEEE Trans.
Ind. Electron., vol. 56, no. 5, pp. 1815–1819, May 2009.
 D. Fu, Y. Liu, F. C. Lee, and M. Xu, “A novel driving scheme for
synchronous rectifiers in LLC resonant converters,” IEEE Trans. Power
Electron., vol. 24, no. 5, pp. 1321–1329, Oct. 2009.
 K. Jin and X. Ruan, “Hybrid full-bridge three-level LLC resonant
converter—A novel dc–dc converter suitable for fuel-cell power system,”
IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1492–1503, Oct. 2006.
 Y. Gu, Z. Lu, L. Hang, Z. Qian, and G. Huang, “Three-level LLC series
resonant dc/dc converter,” IEEE Trans. Power Electron., vol. 20, no. 4,
pp. 781–789, Jul. 2005.
 B. Yang, F. C. Lee, A. J. Zhang, and G. Huang, “ LLC resonant converter
for front end dc/dc conversion,” in Proc. IEEE Appl. Power Electron.
Conf., 2002, vol. 2, pp. 1108–1112.
 D. Fu, B. Lu, and F. C. Lee, “1 MHz high efficiency LLC resonant
converters with synchronous rectifier,” in Proc. IEEE Power Electron.
Spec. Conf., 2007, pp. 2404–2410.
 D. Fu, F. C. Lee, Y. Liu, and M. Xu, “Novel multi-element resonant
converters for front-end dc/dc converters,” in Proc. IEEE Power Electron.
Spec. Conf., 2008, pp. 250–256.
 F. C. Lee, S. Wang, P. Kong, C. Wang, and D. Fu, “Power architecture
design with improved system efficiency, EMI and power density,” in Proc.
IEEE Power Electron. Spec. Conf., 2008, pp. 4131–4137.
 D. Huang, D. Fu, and F. C. Lee, “High switching frequency, high ef-
ficiency CLL resonant converter with synchronous rectifier,” in Proc.
IEEE ECCE, 2009, pp. 804–809.
Bor-Ren Lin (S’91–M’93–SM’02) received the
B.S.E.E. degree in electronic engineering from the
National Taiwan University of Science and Tech-
nology, Taipei, Taiwan, in 1988, and the M.S.E.E.
and Ph.D. degrees in electrical engineering from the
University of Missouri, Columbia, in 1990 and 1993,
From 1991 to 1993, he was a Research Assistant
with the Power Electronic Research Center, Uni-
versity of Missouri. Since 1993, he has been with
the Department of Electrical Engineering, National
Yunlin University of Science and Technology, Yunlin, Taiwan, where he is
currently a Professor. He has authored more than 300 published technical
conference and journal papers in the area of power electronics. His main
research interests include power-factor correction, multilevel converters, active
power filters, and soft-switching converters.
Dr. Lin is an Associate Editor of the IEEE TRANSACTIONSON
INDUSTRIAL ELECTRONICS and The Institution of Engineering and Tech-
nology Proceedings—Power Electronics. He was the recipient of Research
Excellence Awards in 2004, 2005, and 2007 from the College of Engineering,
National Yunlin University of Science and Technology. He received the best
paper awards from the IEEE Conference on Industrial Electronics and Appli-
cations 2007, the Taiwan Power Electronics 2007 Conference, and the IEEE
Power Electronics and Drive Systems 2009 Conference.
Jia-Yu Dong received the B.S. and M.S. degree in
electrical engineering from the National Yunlin Uni-
versity of Science and Technology, Yunlin, Taiwan,
in 2008 and 2010, respectively.
His research interests include the design and
analysis of power factor correction techniques,
switching mode power supplies, and soft-switching