Conference Proceeding

BD180LV - 0.18 μm BCD technology with best-in-class LDMOS from 7V to 30V

Analog Foundry Bus. Unit, Dongbu HiTek, Bucheon, South Korea
07/2010; In proceeding of: Power Semiconductor Devices & IC's (ISPSD), 2010 22nd International Symposium on
Source: IEEE Xplore

ABSTRACT 0.18μm BCD technology with the best-in-class nLDMOS is presented. The drift of nLDMOS is optimized to ensure lowest Rsp by using multi-implants and appropriate thermal recipe. The optimized 24V nLDMOS has BVDSS=36V and Rsp=14.5 mΩ-mm2. Electrical SOA and long-term hot electron (HE) SOA are also evaluated. The maximum operating voltage less than 10% degradation of on-resistance is 24.4V.

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    ABSTRACT: This paper reviews the technology trends of BCD (Bipolar-CMOS-DMOS) technology in terms of voltage capability, switching speed of power transistor, and high integration of logic CMOS for SoC (System-on-Chip) solution requiring high-voltage devices. Recent trends such like modularity of the process, power metal routing, and high-density NVM (Non-Volatile Memory) are also discussed. Power management is becoming highly growing market in semiconductor industry. A recent market survey results show that the total power management semiconductor is expected to grow with 15.5% for the next five years. And the future growth of power management market is mainly driven by mobile computer market, infrastructure replacement, alternative energy market, and improving efficiency of existing electronics. BCD (Bipolar-CMOS-DMOS) technology is the best solution for modern power management IC in various applications addressed above. The typical BCD technology offers low voltage logic CMOS transistors, high-voltage CMOS transistors, bipolar transistors, resistors, capacitors, diodes, and power LDMOS (lateral double-diffused MOS) transistors in the same process. The compatibility of CMOS between BCD and log CMOS process is very important for the reuse of the existing IP, which customers take so much time to develop. Normally BCD process has the parasitic bipolar transistors which are good enough to make analog circuits like bang gap reference. A LDMOS is used as a main power switch so that the on-resistance is very important to reduce the power dissipation and the size of the die. Current typical feature size of the BCD is 0.35 μm and 0.18 μm which are relatively larger than that of the CMOS. This is due to the fact that the high-voltage operation of the BCD needs lower doping concentration of the substrate and the large dimension to sustain high breakdown voltage. The BCD technology is evolving to meet the recent market needs. In this paper, the key technical trends in BCD technology are reviewed in terms of voltage capability, switching speed of power transistor, process integration, CMOS density, and some specific options like thick copper metal, memory, and high precision passive components. The paper classifies the BCD technology with several categories: 1) high-speed BCD
    01/2011;

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