Conference Paper

A 17pJ/bit broadband mixed-signal demodulator in 90nm CMOS

Georgia Electron. Design Center, Georgia Inst. of Technol., Atlanta, GA, USA
DOI: 10.1109/MWSYM.2010.5518117 Conference: Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International
Source: IEEE Xplore

ABSTRACT This paper presents the first fully integrated mixed-signal demodulator incorporating ultra low-power 3mW 3Gsps 3-bit ADCs and a 2mW high-speed real-time digital signal processing in 90nm CMOS that requires neither external synchronization controls nor processing to demodulate up to 3.5Gbps binary phase-shift keying (BPSK) modulated signal. The demodulator is integrated with IQ mixers, 13GHz QVCO, frequency synthesizers and baseband AGC, for an overall power consumption of 60mW from a 1V supply. The entire demodulator chip occupies 1.275×1.19mm2 and enables error free demodulation up to 2.5Gbps and BER of 1E-09 up to 3Gbps. To the best of authors' knowledge, this demonstrates the maximum throughput at minimum power budget among all types of CMOS multi-gigabit demodulators.

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