Conference Proceeding

Verification of SystemC transaction level models using an aspect-oriented and generic approach

04/2010; DOI:10.1109/DTIS.2010.5487605 pp.1 - 6 In proceeding of: Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on
Source: IEEE Xplore

ABSTRACT Transaction level modeling (TLM) has become an accepted and well supported paradigm that is intended to create hardware designs at high abstraction levels. In this paper, we present a methodology that targets the verification of SystemC transaction level models using runtime monitoring. Aspect-oriented programming (AOP) techniques are exploited to handle the high-level TLM features in an automated and generic way. No modifications are needed in the design's SystemC code. In addition, a wide range of functional and performance assertions is addressed. We demonstrate the usefulness of our approach on a realistic system-on-chip platform based on TLM-2.0 standard compliant models and including Open Core Protocol (OCP) interfaces.

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Keywords

abstraction levels
 
Aspect-oriented programming
 
design's SystemC code
 
high-level TLM features
 
OCP
 
performance assertions
 
realistic system-on-chip platform
 
SystemC transaction level models
 
TLM-2.0 standard compliant models
 
Transaction level modeling
 
verification