Conference Paper

Model Checking PLC Software Written in Function Block Diagram

Mobility Div., Siemens, Braunschweig, Germany
DOI: 10.1109/ICST.2010.10 Conference: Proceedings Third International Conference on Software Testing, Verification and Validation (ICST), At IEEE
Source: IEEE Xplore

ABSTRACT The development of Programmable Logic Controllers (PLCs) in the last years has made it possible to apply them in ever more complex tasks. Many systems based on these controllers are safety-critical, the certification of which entails a great effort. Therefore, there is a big demand for tools for analyzing and verifying PLC applications. Among the PLC-specific languages proposed in the standard IEC 61131-3, FBD(Function Block Diagram) is a graphical one widely used in rail automation. In this paper, a process of verifying FBDs by the NuSMV model checker is described. It consists of three transformation steps: FBD→TextFBD→tFBD→NuSMV. the novel step introduced here is the second one: it reduces the state space dramatically so that realistic application components can be verified. The process has been developed and tested in the area of rail automation, in particular interlocking systems. As a part of the interlocking software, a typical point logic has been used as a test case.

1 Follower
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: The design of correctly implemented controls in material handling systems (MHS) is time consuming and cumbersome. The developer has to deal with an ever increasing complexity and heterogeneity of MHS on the one hand, but also with short development cycles and high demands to MHS on the other hand. For baggage handling systems (BHS) at airports, the error-free implementation of routing strategies is especially of importance, as these strategies are critical to safety. This paper proposes a compositional approach to the formal verification of routing in MHS. The approach is based on the theory of assume-guarantee reasoning, where proofs of the overall system are derived from proofs of subsystems. Moreover, the approach has been implemented in a tool that automatically carries out the verification. A real-world example is discussed in this paper, showing the benefits and scalability of the presented approach.
    IEEE Transactions on Automation Science and Engineering 09/2013; 10(4):900-915. DOI:10.1109/TASE.2013.2276763 · 2.16 Impact Factor
  • [Show abstract] [Hide abstract]
    ABSTRACT: In order to maximize cost and quality gains, industrial automation systems need to incorporate the best practices of software engineering in their application development process. However, this requires the right set of tools and methodologies that cater to the needs of the automation domain. While there have been a few efforts towards applying state-of-the-art software engineering tools and techniques to the automation domain, these have not been universally adopted. This paper discusses some of the challenges in adopting software engineering principles for industrial automation application development. Further, the paper presents a case for research activities to look for more practical solutions for industrial applications.
    11th IEEE International Conference on Industrial Informatics (INDIN), Bochum, Germany.; 07/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Railway interlocking systems represent a challenge for model checkers: although encoding interlocking rules as finite state machines can be quite straightforward, and safety properties to be proved are easily expressible, the inherent complexity related to the high number of variables involved makes the verification of such systems typically incur state space explosion problems. Domain-specific techniques have been adopted to advance the size of interlocking systems that can be successfully proved, but still not reaching the size needed for large deployment cases. We propose a novel approach in which we exploit a distributed modelling of an interlocking system and a careful selection of verification scenarios, so that parallel verifications conducted on multiple processors can address systems of a large size. Some experiments in this direction are presented and new directions of research according to this proposal are discussed.
    Proceedings of the 5th international conference on Leveraging Applications of Formal Methods, Verification and Validation: applications and case studies - Volume Part II; 10/2012

Full-text (2 Sources)

Available from
Jun 5, 2014