Conference Paper

Optimization of metallization processes for 32-nm-node highly reliable ultralow-k (k=2.4)/Cu multilevel interconnects incorporating a bilayer low-k barrier cap (k=3.9)

Adv. Device Dev. Div., NEC Electron. Corp., Sagamihara, Japan
DOI: 10.1109/IEDM.2009.5424270 Conference: Electron Devices Meeting (IEDM), 2009 IEEE International
Source: IEEE Xplore

ABSTRACT Reliability of 32-nm-node ultralow-k (k=2.4)/Cu multilevel interconnects incorporating a bilayer low-k barrier cap (k=3.9) was improved without excessive wiring resistance by using CuAl seed technology with high-temperature and short-time annealing. Though the increase in wiring resistivity was about 10%, both electromigration (EM) and stress-induced voiding (SiV) reliability was clearly improved by using Cu-0.5 wt%Al seed metal.

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