Conference Paper

Vertically Integrated Circuits at Fermilab

Electr. Eng. Dept., Fermi Nat. Accel. Lab., Batavia, IL, USA
DOI: 10.1109/NSSMIC.2009.5402167 Conference: Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE
Source: IEEE Xplore

ABSTRACT The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

Download full-text

Full-text

Available from: Marcel Trimpl, Aug 26, 2014
0 Followers
 · 
125 Views
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Vertex detectors for High Energy Physics experiments require pixel detectors featuring high spatial resolution, very good signal to noise ratio and radiation hardness. A way to face new challenges of ATLAS/SLHC future hybrid pixel vertex detectors is to use the emerging 3-D Integrated Technologies. However, commercial offers of such technologies are only very few and the 3-D designer's choice is then hardly constrained. Moreover, as radiation hardness and specially SEU tolerance of configuration registers is a crucial issue for SLHC vertex detectors and, as commercial data on this point are always missing, a reliable qualification program is to be developed for any candidate technology. We will present the design and test (including radiation tests with 70 kV, 60W X-Ray source and 24 GeV protons) of Chartered, 130nm Low Power 2-D chips realized for this qualification.
    IEEE Nuclear Science Symposium conference record. Nuclear Science Symposium 01/2010; DOI:10.1109/NSSMIC.2010.5874036
  • [Show abstract] [Hide abstract]
    ABSTRACT: VeSTIC technology [1, 2] is a very promising concept of digital, analog and mixed mode ICs design, providing very large scale of integration, extreme layout regularity, as well as the possibility of manufacturing cost reduction and of fully three-dimensional integration. These features seem to be very attractive also in the case of MEMS systems, in particular MAP sensors. With regard to prospective applications, a first insight to noise spectra and radiation hardness of the field-effect VeSTIC devices has been performed and confirms their usefulness.
    2014 MIXDES - 21st International Conference "Mixed Design of Integrated Circuits & Systems"; 06/2014
  • [Show abstract] [Hide abstract]
    ABSTRACT: The Vertically Integrated Photon Imaging Chip (VIPIC) project explores opportunities of the three-dimensional integration for imaging of X-rays. The design details of the VIPIC1 chip are presented and are followed by results of testing of the chip. The VIPIC1 chip was designed in a 130 nm process, in which through silicon vias are embedded right after the front-end-of-line processing. The integration of tiers is achieved by the Cu-Cu thermo-compression or Cu-based oxide-oxide bonding. The VIPIC1 readout integrated circuit was designed for high timing resolution, pixel based, X-ray Photon Correlation Spectroscopy experiments typically using 8 keV X-rays at a synchrotron radiation facility. The design was done for bonding a Silicon pixel detector, however other materials can be serviced as long as the positive polarity of charge currents is respected.
    IEEE Transactions on Nuclear Science 01/2014; 61(1). DOI:10.1109/TNS.2013.2294673 · 1.46 Impact Factor