Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch
ABSTRACT In this paper, we have designed a double-gate MOSFET and compared its performance parameters with the single-gate MOSFET as RF CMOS switch, particularly the double-pole four-throw (DP4T) switch, for the wireless telecommunication systems. A double-gate radio-frequency complementary metal-oxide-semiconductor (DG RF CMOS) switch operating at the frequency of microwave range is investigated. This RF switch is capable to select the data streams from antennas for both the transmitting and receiving processes. We emphasize on the basics of the circuit elements (such as drain current, threshold voltage, resonant frequency, resistances at switch ON condition, capacitances, and switching speed) required for the integrated circuit of the radio frequency sub-system of the DG RF CMOS switch and the role of these basic circuit elements are also discussed. These properties presented in the switches due to the double-gate MOSFET and single-gate MOSFET have been discussed.
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ABSTRACT: In this paper, a drain current model incorporating drain-induced barrier lowering (DIBL) has been developed for Dual Material gate Cylindrical/Surrounding gate MOSFET (DMG CGT/SGT MOSFET) and the expressions for transconductance and drain conductance have been obtained. It is shown that DMG design leads to drain current enhancement and reduced output conductance. The effectiveness of DMG design was scrutinized by comparing with single metal gate (SMG) CGT/SGT MOSFET. Moreover, the effect of technology parameters variations workfunction difference has also been presented in terms of gate bias, drain bias, transconductance and drain conductance. Results reveal that the DMG SGT/CGT devices offer superior characteristics as compared to single material gate CGT/SGT devices. A good agreement between modeled and simulated results has also been obtained thus providing the validity of proposed model.Microelectronics Journal. 01/2012; 43:17-24.
Article: On optimal scarcity prices[Show abstract] [Hide abstract]
ABSTRACT: This article contributes to the debate of missing money (compare Joskow(2007a)). This debate has seriously questioned the desirability of limiting scarcity prices in markets with fluctuating demand by emphasizing their potentially negative impact on firms' investment decisions in the long run. A prominent example are recently liberalized electricity markets, where competition authorities have imposed price caps3 or adopted other measures to mitigate high scarcity prices.The impact of reduced scarcity prices in the long run still is only incompletely explored. We thus analyze investment of firms in base load and peak load technologies in a market with fluctuating demand under imperfect competition. We show that an appropriately chosen limitation of scarcity prices is not only beneficial in the short run but also in the long run. It leads to a strict increase of investment in peak load technologies, leaving investment in base load technologies unchanged. Furthermore, we characterize the optimal limit on scarcity prices.International Journal of Industrial Organization 09/2011; · 0.84 Impact Factor
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ABSTRACT: Conventional CMOS switch uses NMOS as transistors in its main architecture requiring a control voltage of 5.0 V and a large resistance at the receivers and antennas (ANTs) to detect the signal. A CMOS integrated circuit switch uses FET transistors to achieve switching between multiple paths, because of its high value of control voltage. Hence it is not suitable for modern portable devices which demand lesser power consumption. Therefore, we proposed a new Double-Pole Four-Throw (DP4T) switch by using RF CMOS technology and analyzed its performance. Further, main objective is to provide a plurality of such switches arranged in a densely configured switch array, where the power and area could be reduced as compared to already existing switch configuration as SPDT and Double-Pole Double-Throw (DPDT) transceiver switches, which is simply a reduction of signal strength during transmission of the RF signals. The presented result for the proposed DP4T switch reveals the peak output currents (drain current) around 0.116–0.387 mA and a switching speed of 19–36 ps.Journal of Circuits System and Computers 07/2012; 21(04). · 0.24 Impact Factor