The Wide Field Imager for the International X-ray
J. Treisa,d,h, L. Bombellig, C. FiorinigS. Herrmanna,b, T. Laufa,b, P.Lechnera,e, G. Lutza,e,
P. Majewskia,e, M. Porroa,b, R. H. Richtera,c, A. Stefanescua,f, L. Str¨ udera,b, G. de Vitaa,b
aMPI Halbleiterlabor, Otto-Hahn-Ring 6, 81739 M¨ unchen, Germany;
bMax-Planck-Institut f¨ ur extraterrestrische Physik, Giessenbachstraße,
85748 Garching, Germany;
cMax-Planck-Institut f¨ ur Physik, F¨ ohringer Ring 6, 80805 M¨ unchen, Germany;
dMax-Planck-Institut f¨ ur Sonnensystemforschung, Max-Planck-Straße 2,
37191 Katlenburg-Lindau, Germany;
ePNSensor GmbH, R¨ omerstraße 28 , 80803 M¨ unchen, Germany;
fJohannes Gutenberg Universit¨ at Mainz, Institut f¨ ur anorganische & analytische Chemie,
55099 Mainz, Germany;
gPolitecnico di Milano, Dipartimento di Elettronica e Informazione,
hOn behalf of the IXO WFI consortium
The large collecting area of the X-ray optics on the International X-ray Observatory (IXO), their good angular
resolution, the wide bandwidth of X-ray energies and the high radiation tolerance required for the X-ray detectors
in the focal plane have stimulated a new development of devices which unify all those science driven specifications
in one single detector. The concept of a monolithic, back-illuminated silicon active pixel sensor (APS) based on
the DEPFET structure is proposed for the IXO mission, being a fully depleted, back-illuminated 450 μm thick
detector with a physical size of about 10 × 10 cm2corresponding to the 18 arcmin field of view. The backside
will be covered with an integrated optical light and UV-filter. Corresponding to the 5 arcsec angular resolution
of the X-ray optics, 100 x 100 μm2large pixels in a format of approximately 1024 x 1024 are envisaged, matching
the point spread function of approximately 500 μm HEW of the optics. The energy range from 100 eV to 15 keV
is achieved by an ultra thin radiation entrance window for the low energies and 450 μm depleted silicon thickness
for higher energies. The fast readout of 1.000 full frames per second is realized by a dedicated analog CMOS
front end amplifier IC. The detector device is intrinsically radiation hard. The leakage current from the bulk
damage is controlled through the operation temperature around -60◦C and by the high readout speed. Results
of various prototype measurements will be shown.
Keywords: IXO, XEUS, X-Ray, Astronomy, DEPFET, Macropixel, Active Pixel Sensor, Imaging spectroscopy
1. THE IXO MISSION
The International X-ray Observatory (IXO) is a joint effort by NASA, ESA and JAXA to build the next-
generation facility-class X-ray mission. Its key component is a grazing incidence angle X-ray mirror system with
an effective area larger than 3 m2effective area at 1.25 keV, a focal length of 20 m and an angular resolution of
5 arcseconds. Amongst the major science questions tackled by IXO are the questions
Further author information: (Send correspondence to J. Treis)
J. Treis: E-mail: email@example.com, Telephone: +49 89 83940045, Fax: +49 898 3940013
UV, X-Ray, and Gamma-Ray Space Instrumentation for Astronomy XVI,
edited by Oswald H. Siegmund, Proc. of SPIE Vol. 7435, 743506 · © 2009 SPIE
CCC code: 0277-786X/09/$18 · doi: 10.1117/12.826195
Proc. of SPIE Vol. 7435 743506-1
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Figure 1. Conceptual view of the IXO spacecraft. The central spacecraft module accommodates most spacecraft sub-
systems including the power, propulsion, RF communications, guidance, navigation and control, and avionics. The optics
module with the flight mirror assembly is attached to the front of the spacecraft module. To achieve the long focal length
of 20 m, the optical bench of the spacecraft has to be made extendable. The X-ray optical path will be shielded by a 3.9 m
diameter shroud, which also contains an X-ray baffle system. The instrumentation is located on the instrument module,
which will be deployed to the focal spot of the mirror system after launch. It consists of the Fixed Instrument Platform
(FIP), which holds all the backend electronics for the instruments, and the movable instrument platform (MIP), which
holds the sensors for the on-axis instruments itself and which can be rotated around a fixed axis to move the requested
instrument into the optic’s focal spot.
• What happens close to a black hole?
• How did supermassive black holes grow?
• How does large scale structure form?
• And what is the connection between these processes?
To address these questions, a suite of five instruments is proposed as scientific payload for IXO:
XMS : The X-ray Microcalorimeter Spectrometer is a non-dispersive imaging spectrometer, using an array of
superconductive Transition Edge Sensors (TES). It has a spectral resolution of 2.5 eV in a field of view
(FoV) of 2 × 2 arcmin, and 10 eV in an extended FoV of 5 × 5 arcmin.
HTRS : The High Time Resolution Spectrometer is an array of 37 hexagonal Silicon Drift Diodes (SDD),
placed out of focus, so that the converging beam from the mirror assembly is distributed across the whole
SDD array. This allows IXO to observe objects with fluxes of up to 106counts per second without pile-up
degradation with very high time resolution. The HTRS provides a moderate energy resolution of about
200 eV FWHM @ 5.9 keV, but provides no imaging capabilities.
XPOL : The X-ray Polarimeter is an imaging polarimeter, sensitive roughly to a 1 % level polarisation of a
X-ray source of 1 mCrab in a 100 kilosecond observation. It has a FoV of 2.6 × 2.6 arcmin, and a moderate
energy resolution of E/ΔE ∼ 5 at 6 keV.
Proc. of SPIE Vol. 7435 743506-2
XGS : The X-ray Grating Spectrometer is a non-imaging dispersive high resolution spectrograph. It is the only
instrument that is operated constantly in parallel to the other instruments, as it diffracts light out of the
main optical path onto its CCD detector array. The effective area used by the XGS is Aeff= 1000 cm2in
the energy range between 300 eV and 1 keV. It offers a very high spectral resolution of λ/Δλ = 3000.
WFI/HXI : The Wide-Field Imager and High-energy X-ray Imager are two independent instruments that are
mounted behind each other in the same instrument slot of IXO’s Movable Instrument Platform (MIP). The
WFI is a silicon Active Pixel Sensor (APS) detector which covers a very large FoV of 18 × 18 arcmin with
good spectral resolution of about 125 eV at 5.9 keV, and good imaging resolution (5-fold oversampling of
the mirror PSF) in the energy range of 100 eV to 15 keV. The HXI, consisting of a stack of Silicon and
CdTe strip detectors surrounded by an anticoincidence counter, extends IXO’s energy coverage to higher
energies. It offers a 8 × 8 arcmin FoV with energy resolution of better than 1 keV at 30 keV in the energy
band between 15 keV and 40keV. To increase the effective area for hard X-rays, a dedicated hard-Xray
mirror module is foreseen in the center of the flight mirror assembly.
Using this comprehensive suite of instruments, IXO will trace orbits close to the event horizon of black holes,
measure black hole spin for several hundred active galactic nuclei (AGN), use spectroscopy to characterize
outflows and the environment of AGN during their peak activity, search for supermassive black holes out to
redshift z = 10, map bulk motions and turbulence in galaxy clusters, search for the missing baryons in the
cosmic web using background quasars, and observe the process of cosmic feedback where black holes inject
energy on galactic and intergalactic scales.
Figure 1 shows the current spacecraft design. Mirror and instrumentation are located on the same spacecraft.
The optics module with the flight mirror assembly is attached to the front of the spacecraft module, which
accommodates the bulk of the spacecraft subsystems including the power, propulsion, radio frequency (RF)
communications, guidance, navigation and control, and avionics. To achieve the long focal length of 20 m and fit
the payload into the launcher at the same time, the optical bench of the spacecraft has to be made extendable.
The X-ray optical path will be shielded by a 3.9 m diameter shroud, which is also equipped with an X-ray baffle
system. The instrumentation is located on the instrument module, which will be deployed to the focal spot of
the mirror system after launch. It consists of the Fixed Instrument Platform (FIP), which holds all the backend
electronics for the instruments, and the movable instrument platform (MIP), which holds the sensors for the
on-axis instruments itself and which can be rotated around a fixed axis to move the instrument requested by
the respective user into the focal spot. Being an on-axis instrument, the WFI is located on the MIP. The XGS
Camera is the only instrument which is mounted on the FIP, as it is an off-axis instrument.
The IXO wide field imager is an imaging X-ray spectrometer with a large field of view. The purpose of the WFI
is to provide images in the energy band between 100 eV to 15 keV, simultaneously with spectrally and time
resolved photon counting. The device consists of a large, wafer-scale focal plane array of DePFET active pixels
integrated onto a common silicon bulk.
2. DEPFET DEVICES
A DEPFET (DEpleted P-channel MOSFET), in its most common variant also referred to as DEPMOSFET
(DEpleted P-channel MOSFET), consists of a p-channel MOS-field effect transistor integrated on the surface of
a fully depleted, high resistivity n-type silicon bulk.1–3
electrons can be generated underneath the device surface and can be enforced and confined in lateral direction
to the area below the transistor channel by an additional deep n-implantation. Incident X-rays interact with
the bulk material, and the resulting electron-hole pairs are separated in the electric field within the bulk; while
holes drift to the most nearby p-contact, the electrons are collected in the potential minima underneath the
most nearby pixels. Here, their presence modifies the charge carrier density in the channel. Thus, the channel
conductivity becomes a function of the charge quantity in the potential minimum, which is therefore referred to
as internal gate. The internal gate persists regardless of the presence of a transistor current. The accumulated
charge can be removed by applying a positive voltage pulse to the clear-contact, an n+-doped region close to the
internal gate, which is shielded towards the bulk by a deep-p implantation and towards the internal gate by a
voltage-controllable MOS barrier, the cleargate. Clear and cleargate together can be considered as an additional
By applying appropriate bias, a potential minimum for
Proc. of SPIE Vol. 7435 743506-3
Figure 2. Cutaway view and microscope photography of a circular DEPMOSFET pixel of 75 × 75 µm2size, and proposed
layout of the IXO matrix. A pixel is made up of a circular p-channel MOSFET with attached clear region. The clear
region consists of another MOS gate and an n+-implantation, which form an additional n-channel MOSFET contacting
the internal gate. The circular polysilicon gate has a width of 5 µm and a circumference of 47.5 µm. The respective
representative circuit schematic is also shown. The pixels are separated by an implanted region, the channel separation,
and an MOS separator structure. In case of the proposed pixel layout for the IXO WFI (right), the larger 100 × 100
µm2pixel size requires a different layout of the channel separation / MOS separator structure, while the layout of the
pixel structure itself remains unchanged. The individual pixels are now completely surrounded by the MOS separator
structure (visible in this figure as a light, ring shaped structure) and the implanted pixel separation region, filling the
space in between the pixels.
n-channel MOSFET connecting clear and internal gate (see figure 2). The usual way to evaluate the matrix signal
is to remove the charge regularly from the internal gate using the clear, and to measure the channel conductivity
before and after the clear. The change of the channel conductivity is a measure of the charge accumulated within
the pixel since the time of the previous clear.
The most common ways to convert the change of the channel conductivity to a measurable signal are the source
follower and the drain based current readout. For the source follower, the pixel source contact is biased by a
constant current source; arrival of charge in the internal gate yields a voltage step at the source node which
is proportional to the amount of charge collected. The charge information can be recovered by comparing the
voltage levels at the source node of the pixel before and after the clear process. The relation between the charge
in the internal gate and the resulting voltage step at the source node can be estimated to be:
where gmis the transconductance of the DEPMOSFET’s external gate, gqthe so-called charge transconductance,
which is the ratio
and ΔQsthe amount of signal charge removed from the internal gate by the clear. The figure of merit for the
source follower is the source follower gain
expressed in μV signal step per e−charge stored in the internal gate. In the source follower scheme, the readout
speed is limited by the overall source capacitance, which, depending on the sensor array size, can be large. In
combination with the intentionally low gmvalue of the DEPFETs, relative long source settling times result.
Alternatively, the change in the channel conductivity directly converts into a current step in case the transistor
terminals are kept at constant voltages, as it is the case for the drain based current readout. This signal can
be evaluated by a current-to-voltage (I2U)-converter connected to the drain terminal. In this case, the output
voltage can be calculated by:
ΔVout = gc · (gq · ΔQs)
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Figure 3. Source follower (left) vs. drain based current readout scheme (middle). For the source follower readout, a
constant load current is provided, and the DEPFET conductivity change is converted into a voltage step at the source,
which can e.g. be amplified with an AC coupled voltage amplifier. For the drain based current readout, the conductivity
change is converted directly into a current change, as all transistor terminal voltages are fixed, and the current change is
evaluated by an I2U converter. To use the dynamic range of the I2U converter more efficiently, the pixel bias current is
subtracted by a current source. Right: Arrangement and interconnection of pixels on a DEPMOSFET matrix prototype
(simplified). The prototypes are designed for row-wise readout to ease control and readout. For source-follower readout,
the pixels share a common drain contact. Gates, cleargates and clear contacts within one pixel row are connected together,
while the pixel sources are connected column-wise. For drain based current readout, the role of drain and source can be
exchanged, with the consequence of an inversion of pixel topology.
where gc is the current-to-voltage conversion gain of the respective I2U-converter. In contrast to the source
follower (see equation 2), the gqdirectly gives the amplification for the drain based current readout. The basic
principle of the readout schemes is shown in figure 3. While the source follower is AC-coupled and therefore
quite robust against drift, variation of transistor parameters and changes in operating conditions, the drain based
current readout has the advantage of an increased speed; because all DEPFET terminal voltages are fixed, the
source capacitance does not have to be recharged.
3. DEPFET MATRIX DEVICES
To build large area sensors, a DEPFET pixel array is integrated onto a single die with common bulk and back
contact. As the device is fully depleted, the radiation can enter from the backside, which provides for an entrance
window with extremely good quantum efficiency and 100 % fill factor, as no structures are required besides an
extremely thin p+implantation. Furthermore, the entrance window can be equipped with a thin aluminum light
filter to block optical light. In case optical light is to be detected, the entrance window can be provided with an
antireflective coating to tailor the quantum efficiency to the respective application.
For pixel addressing and readout, groups of pixels can be formed, and even individual pixels can randomly be
accessed in case sufficient routing resources are available. For most applications, however, a simple interconnec-
tion scheme turned out to be sufficient, which is shown in figure 3 (right) as an example for the source follower
case. Matrix readout is done row-wise and column-parallel. The terminals for gate, cleargate and clear of the
pixels are connected row wise, while the source contact is connected column wise, and the drain contact is con-
nected globally to all pixels within the matrix. All pixels within one row integrate signal charges for a fixed time
interval. For readout, the transistor currents in the respective row are turned on, the voltage level at the source
node is measured (signal level) and the clear operation is performed within in the row. Next, the voltage level
at the source node is measured again, now corresponding to the pixel signal with empty internal gate (baseline
level). The charge information can be obtained from the difference between signal and baseline level. Then, the
row is turned off and the process is repeated in the next row. The readout takes place continuously in a rolling
Proc. of SPIE Vol. 7435 743506-5
Figure 4. Schematic view of the proposed IXO WFI sensor geometry. The sensor is monolithically integrated on a single
6-inch wafer. The sensor is logically divided into two hemispheres, consisting of 8 sectors each. Every Sector consists of
512 × 128 pixels of 100 × 100 µm2size and is read out by its dedicated readout IC. The overall sensitive area is about
10 × 10 cm2and the total pixel count below 1024 × 1024. The corners of the sensor are left free, as pixels here would be
located far outside the FOV. The figure to the right shows a photo of a mechanical sample of the IXO wafer-scale sensor.
shutter mode, i.e. as soon as all rows within the matrix have been fully processed, the readout starts over from
the beginning, and the integration time for one row corresponds to the sum of the processing times for all other
rows. Readout can be sped up in case more than one row is turned on at a time. In this case, the outputs
of the simultaneously operated pixels have to be connected to separate readout column contacts equipped with
individual readout circuitry. A common way to implement a scheme like this is to divide the sensor into two
halves, with the respective readout electronics placed at opposite edges of the sensor. This kind of subdivision
is not connected with a loss of quantum efficiency or geometrical fill factor, as it affects only the electrical in-
terconnection of the pixels. Although the sensor pixel interconnection limits the possibilities to randomly access
the pixels, windowing or fast repetitive readout of sensor areas which are brightly illuminated are still possible
in case a reasonably flexible control electronics for the row terminal voltages gate, cleargate and clear can be
provided. Fast, on-the-fly selection of the interesting range of rows is required.
To operate the matrix device, two kinds of Front End electronics are required: a multichannel, low noise analog
amplifier/filter ASIC to process the matrix signals in parallel for all columns as described in section 2, and a
multichannel, high voltage, low noise analog switch to control the voltages applied to the gate, cleargate and
4. THE IXO SENSOR
DEPFET based detectors have been proposed for the IXO WFI because of the following advantages:
• The DEPFET, being a sidewards depleted device, has an extremely low input capacitance in the range of
20 fF, and therefore provides extremely low readout noise and excellent spectroscopic performance.
• As the DEPFET’s internal gate is completely depleted of all charge carriers during the clear, the DEPFET
is a kTC-noise free device.
• The DEPFET’s charge storage capability provides for random selection of pixels or pixel groups, which
makes windowing and repetitive readout possible.
• As the DEPFET is a sidewards depleted device, the entrance window can be made extremely thin, providing
for 100% fill factor and excellent quantum efficiency. On demand, surface structures like optical light filters
or antireflective coatings can be implemented.
Proc. of SPIE Vol. 7435 743506-6
IXO WFI without vis/UV blocking filter
IXO WFI, with vis/UV blocking filter
XMM EPIC-PN with THIN filter
Al & dielectric layers on Si
Al on Si
50 nm Al
70 nm Al
100 nm Al
Figure 5. Expected WFI quantum efficiency curve (left) without and with UV/optical blocking filter(70 nm Al + SiO/SiN
multilayer coating). Shown for comparison is the XMM quantum efficiency, using the thin optical blocking filter. The
difference in the high energy regime is due to an increased bulk thickness in the WFI detector. The figure to the right
shows the optical attenuation for various filter configurations.
• DEPFET based devices are intrinsically radiation hard, as they are backside illuminated devices and, unlike
a CCD, the charge does not have to be transferred to a readout node, but is stored and read out where it
• The DEPFET technology is radiation tolerant. Its robustness against ionizing and non-ionizing damage
has already been proven experimentally.
In the current configuration, the Active Pixel Sensor for the IXO WFI is foreseen to be a monolithic device. It
will cover nearly all of the usable area of a single 6- inch wafer of 450 μm thickness and will consist of an array
of 1024 × 1024 pixels. Figure 4 shows a schematic overview over the IXO sensor and a photo of a mechanical
sample. The pixels are organized in two hemispheres and a total number of 16 sectors, 8 per hemisphere, of
128×512 pixels each. The baseline design foresees a pixel size of 100 ×100 μm2, a corresponding layout is shown
in figure 2. In order to facilitate monolithic integration onto a 6 inch wafer, an option is being evaluated in which
one 128 × 128 pixel sector per corner is left free, as they would lie far outside the FOV and would be shaded
by the baffle system anyway. The interconnection of the pixels allows for the selection of an arbitrary number
of ROI ranges of pixel rows of any size, which can be read out at any required readout rate, e.g. to observe
extremely bright objects. This process is controlled by the main sequencer of the WFI (see section 6).
The backside of the sensor device will essentially consist of a thin radiation entrance window with excellent
QE and a fill factor of 100%. As the volume is fully depleted, the entire thickness of the detector serves as
active material, which extends the region of high QE above 10 keV. The quantum efficiency in the energy range
below 1 keV is mainly determined by the properties of the entrance window. Figure 5 shows the expected
quantum efficiencies as expected for various entrance window configurations and the effect of optical background
suppression for various filter thickness values. The current baseline design foresees to integrate both an aluminum
filter of ∼ 70 μm thickness for the reduction of optical photon induced noise and an UV filter consisting of a
SiO/SiN multilayer coating, in addition to the thin entrance window implantation. The target design shows a
QE which is equal or better than that of the XMM EPIC pnCCD4with the so-called ”thin filter” option, for an
attenuation factor of better than 10−5for optical light. For observations in presence of high optical background,
additional filters will be available on a filter wheel / filter sled, which is located in front of the entrance window
and also provides a closed position as well as calibration sources for WFI and HXI.
The sensor pixel array is going to be read out row-wise in a column-parallel way, as shown in figure 3 (right).
Every sector has its own Analog Readout IC, all of which are controlled and read out using an hemisphere-
individual flexlead connection for redundancy reasons. The same is the case for the Control Front End ICs.
The readout configuration and pixel interconnection for the WFI is shown in figure 6. In the final instrument
Proc. of SPIE Vol. 7435 743506-7
West Switchers (Clear)
East Switchers (Gates)
Figure 6. Pixel interconnection and matrix organization of the IXO WFI Focal plane sensor. Every sector is read out
by its individual Analog Front End IC, which is located together with the Control Front End ICs on a hybrid ceramics
surrounding the sensor active area and are connected to the sensor using conventional wedge-wedge wire bonds. The
hemispheres are read out independently for redundancy reasons, and are connected via separate flexlead connectors to
the peripheral, hemisphere-individual readout electronics. As the Control Front End ICs connect all pixels row-wise, any
operation (e.g. the clear) performed within one channel of the control front ends become effective to all pixels within that
stack, the WFI is located directly on top, and the backside entrance window is directly facing the flight mirror
assembly. Soft X-rays in the energy range below ∼ 15 keV are almost completely absorbed by the WFI. The
harder X-rays passing through the WFI will be detected by the HXI located directly behind the WFI. The
Analog and Control Front End ASICs are mounted together with heater elements, temperature sensors and
other auxiliary components on a ceramic hybrid circuit board. The WFI sensor is then mounted together with
an invar spacer, the hybrid ceramics and a backing ceramics in a suspension type mount to form the so-called
FPA (Focal Plane Assembly) sandwich. This sandwich is then to be integrated within the WFI/HXI instrument
as shown in figure 7. WHI and HXI are mounted directly behind each other, only separated by a thin shield,
which blocks fluorescence radiation from the HXI and provides for a certain degree of thermal decoupling of WHI
and HXI, as the latter one needs to be heated up from time to time due to polarization effects. The HXI itself
consists of a stack of silicon strip detector planes and CdTe strips, surrounded by an active BGO anticoincidence
shield for background rejection. The silicon strip detector layers increase the energy overlap between HXI and
WFI and also fill the gap in the anticoincidence shield in the forward direction, as they also provide a certain
degree of suppression for compton and cosmics background events.
5. FRONT END ELECTRONICS
As described in section 3, customized multichannel ASICs are required for the operation of the WFI matrix. The
speed requirement for the final IXO WFI demand improved speed performance especially for the analog readout
ICs. The baseline for the Analog Front End IC foresees 128 channel ICs with a fast trapezoidal filter stage. The
trapezoidal filter is the optimum filter in case white series noise is the dominant noise source,5which is the case
for the DEPFET device in the IXO readout speed regime.
Currently, concepts for multichannel ASICS implementing the trapezoidal filter have been developed. Two
different FE solutions have being designed, and 64 channel ASIC prototypes have been developed. In both cases,
the shaping is implemented by means of current integrating and subtraction stages. One of the designs, the
so-called VELA (VLSI ELectronic for Astronomy) IC, is dedicated for drain-based current readout and directly
integrates the current provided by the pixel device; to use the amplifier’s dynamic range more efficiently, the
offset current of the pixel is subtracted prior to signal acquisition. The other design, the so-called ASTEROID
(Active current Switching TEchnique ReadOut In X-ray spectroscopy with DEPFET) IC,6features the source
Proc. of SPIE Vol. 7435 743506-8
Active BGO shield
Figure 7. Integration of the WFI sensor in the WFI / HXI instrument stack. The sensor wafer will be mounted together
with an invar spacer between the hybrid and a backing ceramic using a suspension mount type of fixture. To provide good
thermal contact, the sensor wafer’s dead area will not be cut off, but will only be slightly altered in shape to fit within
the invar spacer. This WFI sandwich will then be integrated in the instrument stack. To the sides and the backside, the
HXI is embedded within an active BGO shield. In this way it is ensured, that the hard X-rays passing through the WFI
without interaction can then be recorded by the HXI, and imaging spectroscopy measurements are possible with both
follower, using the same shaper, but a combination of a first stage amplifier and a current-to-voltage converter
for interfacing source follower and shaper. Block diagrams of the two structures are shown in figure 9. In spite of
their different input stages, both ICs have identical filtering stages, followed by a sample & hold circuit and an
sequencer-controlled analog output multiplexer. To control the filter and multiplexer timing, the filter sequence
is stored within an on-chip sequencer RAM. The ICs also offer on-chip DACs for setting the bias points of the
various amplifier stages, a very fast and flexible, sequencer controlled analog output multiplexer, the possibility to
inject arbitrary test patterns and a system-friendly SPI control interface. The on-chip memory was implemented
using Dual Port DICE (Dual Interlocked Storage Cells) to increase robustness against Single Event Upset (SEU)
events. 64 channel versions of both ICs have been developed and are being examined with respect to their
suitability for the IXO WFI instrument. Both ICs have been made in an 0.3 AMS 3.3 V CMOS process, and
have already proven their suitability for the use with DEPFET devices (see section 7). The baseline for the
IXO Analog Front End is the drain based current readout concept, as it has already proven the required speed
performance. Nevertheless, the source follower development is continued as a fallback solution. Although it has
some limitations in terms of e.g. the readout speed, because due to its AC-coupled architecture it is very robust
in terms of e.g. parameter shift due to radiation damage or pixel-to-pixel variation of the sensor.
To control the row terminal voltages, the SWITCHER II IC is currently used.7
output, high voltage switching circuit manufactured in an AMS 0.8 μm high voltage CMOS process. It has been
specially designed for the purpose of DEPMOSFET matrix readout and provides two output ports for every
channel, which can be toggled between two individual voltages each. Facilities for precise timing of the switching
process and easy integration of a large number of SWITCHER ICs make it a suitable device for building a daisy
chain to read out large sensor arrays. The total switch voltage difference can be as large as 20 V. Based on the
heritage of the Switcher IIb, a radiation hard variant of the IC using the 0.3 AMS 3.3 V CMOS process using the
high voltage option is under development. This IC will feature even higher switching voltage ranges and is being
designed for the needs of the MIXS Focal Plane Instrumentation, and will be the basis for further developments
for IXO. The baseline for IXO foresees both front ends to be manufactured in an 128 channel version for the use
on the IXO WFI FAP.
This is a 64 channel, dual
6. DATA ACQUISITION SYSTEM
When the FPA is operated, the data acquired by the AFE ASICs is multiplexed to 32 analog voltage outputs per
row. To achieve the targeted frame rate of 1000 frames per second, a total line processing time of ∼ 2.5μs per row
is required, and assuming an upper limit of 16 bit digitization, this corresponds to a raw data rate of about than
1.5 Gbyte/s. It is immediately obvious that the raw data must be efficiently reduced at an early stage. Figure 8
shows the data stream and the distribution of the various preprocessing stages among the respective components
Proc. of SPIE Vol. 7435 743506-9
Conversion of signal in charge
First stage Amplification by DEPFET
Second stage amplifier & filter / signal shaper
Conversion into analog voltage signal
Digital signal acquisition
Serial preprocessor operations, e.g. offset
and gain correction, CM correction etc.
Hemisphere image built
Further preprocessing operations:
hit & pattern detection, event recombination
Frame image building
Border pixel reconstruction
Data formatting & compression for telemetry
1024 x 512 pixels
78 x 78 m
8 sectors á 128 x 512
8 Switchers /
1 CAMEX / sector
8 CAMEX ICs /
4 ADC clusters /
2 ADCs / sector
2 CAMEX ICs / cluster
Serial analog data
Digital preprocessed data
Figure 8. Data flow within the IXO WFI instrument (left). The sensor signal is amplified and filtered by the AFE ICs
and then digitized. The digitized data is fed in the first preprocessing stage, which corrects offset and gain, removes
masked pixels and performs the first step of the hit detection by applying a primary threshold. In the next step, first
zero suppression is performed by discarding empty pixels, and the data is further transferred to the frame builder, where
patterns are identified, the final step of the zero suppression is done and the data is prepared for telemetry. These tasks are
distributed among the WFI system components as shown (right). In addition to the FPA, the hemisphere preprocessors
and the frame builder, a central control and configuration module containing sequencer, housekeeping and spacecraft
interfacing, is required.
T o readout node /
T o readout node /
Figure 9. Block diagrams of a channel of the new readout electronics examined as prototypes for the IXO analog front
ends. Both devices implement trapezoidal filtering by the use of a combination of integrating and subtraction stages.
The source follower device (left plot) uses an AC-coupled first stage amplifier and a current-to-voltage converter as an
interface to the integrator, the current-based drain readout device (right) has a low-noise current subtraction stage at the
input to subtract the pixel’s offset current.
in the current baseline instrument design. In the first step of data processing, a set of FPGAs perform simple,
serial-data oriented DAQ tasks like noise, threshold and offset calculations and offset and gain corrections. The
first stage FPGAs join the data streams from four ADCs each, and, together with their ADCs, form a total
of eight ADC Clusters. In a second step, the data streams from the four ADC cluster of each hemisphere
are aggregated by a Framelet Builder FPGA. In this FPGA, data reduction steps requiring knowledge about
neighboring pixels are performed. Pixels exceeding a threshold value are identified and flagged as seed pixels.
The neighborhood around all seed pixels is transferred to a third stage data reduction, while all pixels not near a
seed pixel are discarded. As each Framelet Builder has no knowledge of the other’s hemisphere, additionally all
Proc. of SPIE Vol. 7435 743506-10
pixels near the hemisphere border are transmitted. In the third stage data processing, a Frame Builder FPGA
joins the data from the two Framelet Builders. Seed patterns spanning the hemisphere border are detected, and
the final zero suppression is performed. After this, more complex data analysis routines operate on the remaining
events. Hit patterns are recognized and classified, further corrections for sensor or FEE specific properties can
be implemented, and the final frames are assembled, time-stamped, and compressed in preparation for telemetry.
The entire WFI is controlled by the Brain module, containing the main instrument control, the housekeeping, the
communication with the spacecraft environment, control of the power supplies and the main sequencer for the
data acquisition. It controls and configures also the sequence of acquisition modes, the setting of ROI windows
and the repetition rate of their readout.
7. PROTOTYPE DEVICES
Since the development of DEPMOSFET pixels was started, a large number of matrix devices have been built
and tested at the MPI semiconductor laboratory in Munich. The device sizes range from single pixels over small
matrices consisting of 64 × 64 pixels of 75 × 75 μm2size,8having a total sensitive area of 4.8 × 4.8 mm2, up
to large DEPFET Macropixel devices, consisting of 64 × 64 pixels of 0.5 × 0.5 mm2size and having an overall
sensitive area of 3.2 × 3.2 cm2. The overall production yield was very good, for the large Macropixel devices,9
for instance, the yield was found to be above 70%. Nearly all the good devices were perfect. i.e. no cosmetic
defects or bright or noisy pixels were visible. As shown in figure 10, the devices show near Fano-limited energy
resolution even at fast readout speed.
As towards the IXO WFI the pixel count has to be increased as well as the overall pixel size, the following steps
are planned in the next few years:
• Test matrix devices with 256 x 256 pixels of 75 × 75 μm2size with uni- and bidirectional readout, which
have been produced earlier.
• Test prototypes for IXO WFI sectors, having 128 x 512 pixels of 75 × 75 μm2size, to estimate the impact
of increased readout capacitance on the spectral performance.
• Test IXO quadrant prototypes of 512 × 512 pixels of 75 × 75 μm2size, the production of which has just
8. SUMMARY AND OUTLOOK
The Wide Field Imager on board the International X-ray Observatory IXO will contain a giant monolithic
DEPFET based active pixel sensor. The high raw data rate requires a high degree of on-board data preprocessing
and zero suppression, and the requirements in terms of speed require fast, low-noise Analog Front End Electronics,
which is currently under development; the prototypes already show very promising performance when operated
with existing DEPFET matrix devices. The test of large area and large pixel count prototypes is in progress,
the production of larger, more representative IXO prototype devices is on the way.
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010002000300040005000600070008000 Download full-text
Figure 10. Photos of DEPFET prototype devices (left) and performance plots (middle & right). The device in the upper
row is a so-called XS device, a matrix with 64 × 64 pixels of 75 × 75 µm2size, and the device in the lower row is a
so-called Macropixel devices with an overall sensitive area of 3.2 × 3.2 cm2, being composed of 64 × 64 pixels of 0.5 × 0.5
mm2size. The middle plots show typical energy spectra of an55Fe source as measured with the Macropixel device with
an ASTEROID readout IC and an overall processing time of 6.2 µs onlym, corresponding to a framerate of 2.5 kHz. The
measured energy resolution is 126 eV FWHM @ 5.9 keV for the singles spectrum, and 128 eV for the integral spectrum
taking into account all event pattern types. The lower plot in the logarithmic scaling shows the peak-to-background ratio
of about 3000, qualifying the devices as spectroscopy-grade X-ray detectors. The plots in the right column show a typical
noise (upper row) and gainmap (lower row). No dead or noisy pixels have been found. The noise dispersion is around
8%, as some of the pixels at the bottom of the column are influenced by IR radiation from the nearby ASTEROID IC,
which is not sufficiently shielded. The gain dispersion is around 2.5 %.
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