Conference Paper

A computational reflection mechanism to support platform debugging in SystemC.

DOI: 10.1145/1289816.1289838 Conference: Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, Salzburg, Austria, September 30 - October 3, 2007
Source: DBLP

ABSTRACT System-level and Platform-based design, along with Trans- action Level modeling (TLM) techniques and languages like SystemC, appeared as a response to the ever increasing com- plexity of electronics systems design, where complex SoCs composed of several modules integrated on the same chip have become very common. In this scenario, the exploration and verification of several architecture models early in the design flow has played an important role. This paper pro- poses a mechanism that relies on computational reflection to enable designers to interact, on the fly, with platform sim- ulation models written in SystemC TLM. This allows them to monitor and change signals or even IP internal register values, thus injecting specific stimuli that guide the simula- tion flow through corner cases during platform debugging, which are usually hard to handle by standard techniques, thus improving functional coverage. The key advantages of our approach are that we do not require code instrumenta- tion from the IP designer, do not need a specialized SystemC library, and not even need the IP source code to be able to inspect its contents. The reflection mechanism was imple- mented using a C++ reflection library and integrated into a platform modeling framework. We evaluate our technique through some platform case studies.

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