Conference Paper

Hierarchical Graph: A New Cost Effective Architecture for Network on Chip.

DOI: 10.1007/11596356_33 Conference: Embedded and Ubiquitous Computing - EUC 2005, International Conference EUC 2005, Nagasaki, Japan, December 6-9, 2005, Proceedings
Source: DBLP

ABSTRACT We purposed a new Network on Chip (NoC) architecture called Hierarchical Graph. The most interesting feature of this novel ar- chitecture is its simple implementation process. Furthermore, the flexible structure of this topology makes it suitable for use in application specified chips. To benchmark the suggested architecture with existing ones, basic models of physical implementation have been extracted and simulated using NS-2. The results compared with the common used architecture Mesh show that HG has better performance, especially in local traffics and high loads.

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