Conference Paper

An Application-Level Dependability Analysis Framework for Embedded Systems

DOI: 10.1109/DFT.2011.25 Conference: 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2011, Vancouver, BC, Canada, October 3-5, 2011
Source: DBLP

ABSTRACT This paper presents a framework for an in-depth analysis of transient faults in microprocessor-based embedded systems. The framework is based on a debug-like mechanism supporting an interpretation and analysis of the system behavior from an application point of view, in terms of function execution flow and passed/returned parameters. The framework offers a highly-customizable fault/error debug and classification approach, based on such application-level information, aimed at supporting the designer in the evaluation and tuning of the system dependability-related properties. We present an implementation of the proposed framework within a state-of-the-art fault injection environment for SystemC transaction-level multiprocessor specifications, and we show that the approach can be ported also in other environments. An experimental session considering an embedded system based on a processor highlights the benefits of the proposed approach.

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