Conference Paper

Updates on the Security of FPGAs Against Power Analysis Attacks.

DOI: 10.1007/11802839_42 Conference: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers
Source: DBLP

ABSTRACT This paper reports on the security of cryptographic algorithms implemented on FPGAs against power analysis attacks. We first
present some improved experiments against these reconfigurable devices, due to an improved measurement process. Although it
is usually believed that FPGAs are noisy targets for such attacks, it is shown that simple power consumption models can nearly
perfectly correlate with actual measurements. Then, we evaluate how these correlation values depend on the resources used
in the FPGAs. Finally, we investigate the possibility to counteract these attacks by using random pre-charges in the devices
and determine how this technique allows a designer to increase the security of an implementation. These results confirm that
side-channel attacks present a serious threat for most microelectronic devices, including FPGAs. To conclude, we discuss the
security vs. efficiency tradeoffs.

  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: This paper presents FPGA implementation and overhead evaluation for an algorithmic DPA countermeasure for advanced encryption standard AES. To reduce implementation overhead the masked compact S-Box, proposed by Canright, was chosen to implement a DPA countermeasure on an SRAM FPGA. Obtained results showed that secured AES IP leads to slices number increase by 60,1% and a frequency decrease by 4%.
    Design and Test Workshop, 2008. IDT 2008. 3rd International; 01/2009
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Side-channel cryptanalysis is a new research area in applied cryptography that has gained more and more interest since the mid-nineties. It considers adversaries trying to take advantage of the physical specificities of actual cryptographic devices. These implementation-specific attacks frequently turn out to be much more efficient than the best known cryptanalytic attacks against the underlying primitive seen as an idealized object. This chapter aims to introduce such attacks with illustrative examples and to put forward a number of practical concerns related to their implementation and countermeasures.
    12/2009: pages 27-42;
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: With growing global bandwidth consumption and increasing cyber-attacks, information security actors are in constant need for scalable, high performance products that still provide a high level of security assurance. The French national project "SHIVA" aims at developing a new security architecture providing multiple services and such performance and security assurance levels. Based on research and development from various fields, this paper presents usages of technologies from the high performance computing systems (HPC clusters), FPGA-based reprogrammable devices and the use of formal methods to provide additional assurance to be tested under most standard evaluation criteria. A very high level of security assurance is targeted, hence high attack potentials are assumed as per the Common Criteria Vulnerability Analysis assurance requirements (CC AVA VAN.5): A distributed architecture using scalable InfiniBand interconnect is discussed as a new interconnect method for cryptographic devices. New usages and advantages of relying on such an architecture are presented, as well as various security considerations on threats, attacks and how reprogrammable devices bring innovative solutions to cryptographic initialization process on hostile platforms, as well as optimizations and opportunities opened by the use of pre-processing and formally designed software in handling operational data flow and critical information

Full-text (4 Sources)

Available from
May 22, 2014