Conference Paper

Updates on the Security of FPGAs Against Power Analysis Attacks.

DOI: 10.1007/11802839_42 Conference: Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers
Source: DBLP

ABSTRACT This paper reports on the security of cryptographic algorithms implemented on FPGAs against power analysis attacks. We first
present some improved experiments against these reconfigurable devices, due to an improved measurement process. Although it
is usually believed that FPGAs are noisy targets for such attacks, it is shown that simple power consumption models can nearly
perfectly correlate with actual measurements. Then, we evaluate how these correlation values depend on the resources used
in the FPGAs. Finally, we investigate the possibility to counteract these attacks by using random pre-charges in the devices
and determine how this technique allows a designer to increase the security of an implementation. These results confirm that
side-channel attacks present a serious threat for most microelectronic devices, including FPGAs. To conclude, we discuss the
security vs. efficiency tradeoffs.

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