Conference Paper

Hardware-software analysis of pole model features

DOI: 10.1109/CCECE.2011.6030671 Conference: Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, CCECE 2011, Niagara Falls, Ontario, Canada, 8-11 May, 2011
Source: DBLP


In real time applications or portable devices, software implementation is not enough by itself to evaluate a signal feature analysis technique and a hardware implementation needs to be considered. The selection of the right signal feature analysis technique for an application depends on the algorithmic (software) performance, and also on the hardware efficiency of that technique. However, there are not enough studies exist in the evaluation of the pole modeling feature analysis technique from the hardware/software implementation aspects. The objective of this paper is to investigate both the hardware and software perspectives of pole modeling as a promising signal feature analysis method. The computational complexity is analyzed in detail and an estimation for the FPGA area usage is proposed for pole modeling. This paper also investigates the software performance of pole modeling by performing an audio classification in MATLAB.

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