Conference Paper

Reap what you sow: spare cells for post-silicon metal fix.

DOI: 10.1145/1353629.1353654 Conference: Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008
Source: DBLP

ABSTRACT Post-silicon validation has recently become a major bottleneck in IC design. Several high prole IC designs have been taped-out with latent bugs, and forced the manufacturers to resort to addi- tional design revisions. Such changes can be applied through metal x; however, this is impractical without carefully pre-placed spare cells. In this work we perform the rst comprehensive analysis of the issues related to spare-cell insertion, including the types of spare cells that should be used as well as their placement. In ad- dition, we propose a new technique to measure the heterogeneity among signals and use it to determine spare-cell density. Finally, we integrate our ndings into a novel multi-faceted approach that calculates regional demand for spare cells, identies the most ap- propriate cell types, and places such cells into the layout. Our ap- proach enables the use of metal x at a much smaller delay cost, with a reduction of up to 37% compared to previous solutions.


Available from: Igor L. Markov, May 28, 2015
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