Spiking neural network-based auto-associative memory using FPGA interconnect delays.
ABSTRACT This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.
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ABSTRACT: The computational power of formal models for networks of spiking neurons is compared with that of other neural network models based on McCulloch Pitts neurons (i.e., threshold gates), respectively, sigmoidal gates. In particular it is shown that networks of spiking neurons are, with regard to the number of neurons that are needed, computationally more powerful than these other neural network models. A concrete biologically relevant function is exhibited which can be computed by a single spiking neuron (for biologically reasonable values of its parameters), but which requires hundreds of hidden units on a sigmoidal neural net. On the other hand, it is known that any function that can be computed by a small sigmoidal neural net can also be computed by a small network of spiking neurons. This article does not assume prior knowledge about spiking neurons, and it contains an extensive list of references to the currently available literature on computations in networks of spiking neurons and relevant results from neurobiology.Neural Networks 12/1997; DOI:10.1016/S0893-6080(97)00011-7 · 2.08 Impact Factor
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ABSTRACT: We present an electronic circuit modelling the spike generation process in the biological neuron. This simple circuit is capable of simulating the spiking behaviour of several different types of biological neurons. At the same time, the circuit is small so that many neurons can be implemented on a single silicon chip. This is important, as neural computation obtains its power not from a single neuron, but from the interaction between a large number of neurons. Circuits that model these interactions are also presented in this paper. They include the circuits for excitatory, inhibitory and shunting inhibitory synapses, a circuit which models the regeneration of spikes on the axon, and a circuit which models the reduction of input strength with the distance of the synapse to the cell body on the dendrite of the cell. Together these building blocks allow the implementation of electronic spiking neural networks.Neural Networks 07/2001; 14(6-7):617-28. DOI:10.1016/S0893-6080(01)00067-3 · 2.08 Impact Factor
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ABSTRACT: this paper provides a report on the implementation of both architectures and also offers a comparison with the hybrid structure. 3. The application and design rationale The application selected in this work was a non-linear function approximation problem given by equation 1 : y x x x = + + - + - ( . . ) 1 1 05 2 1 3 15 2 ....(1) where x 1 , x 2 and x 3 are the three input variables confined to the range 1 to 5. This highly non-linear problem has been employed by a number of other researchers to demonstrate the ability of both fuzzy and neuro-fuzzy systems The hardware implementation was designed with the main objective of maximising the utilisation of CLBs. The design approach was modular to accommodate higher order problems with increased granularity and with increased resolution in the digital implementation. The overall design was created and simulated in schematic format using VIEWlogic, and then the Xilinx software facilitated the export of the design and the generation of the corresponding bit file used to configure the target FPGA. 4. The fuzzy, neural network and fuzzy neural network architectures