Conference Paper

Semi-analytical model for schottky-barrier carbon nanotube and graphene nanoribbon transistors.

DOI: 10.1145/1785481.1785538 Conference: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010
Source: DBLP

ABSTRACT This paper describes a physics-based semi-analytical model for Schottky-barrier carbon nanotube (CNT) and graphene nanoribbon (GNR) transistors. The model includes the treatment of (i) both tunneling and thermionic currents, (ii) ambipolar conduction, i.e., both electron and hole current components, (iii) ballistic transport, and (iv) multi-band propagation. Further, it reduces the computational complexity in the two critical and time-consuming steps, namely the calculation of the tunneling probability and the self-consistent evaluation of the the surface potential in the channel. When validated against NanoTCAD ViDES, a quantum transport simulation framework based on the non-equilibrium Green's function method, it is several orders of magnitude faster without significant loss in accuracy. Since the model is physics-based, it is parameterizable and can be used to study the effect of common parametric variations in CNT diameter and GNR width, Schottky-barrier height, and insulator thickness.

  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Contact effects of carbon nanotubes (CNT) to metallic electrodes have a big impact on the electronic transport in CNT-based structures. In general there are two expected types of contacts, Schottky type with semiconducting tubes and ohmic contact with semiconducting and metallic tubes. However not always perfect contacts come, it is rather a tunneling barrier contact because of the weak coupling to the metal electrode or the formation of thin layer of oxides at the interface, for example. We propose a simple model for non-ideal contacts of metallic single walled nanotube (SWNT) in order to calculate the overall resistance and hence the contact resistance. The model takes into account the findings of both experiments and theories such as effect of work function, electron phonon scattering in low and high bias voltage, image potential and van der Waals distance at the interface. The model can be developed to calculate the contact resistance for strips of several SWNTs or multiwalled carbon nanotubes MWNTs.
    Systems, Signals and Devices (SSD), 2012 9th International Multi-Conference on; 01/2012
  • [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, we present a highly accurate closed-form compact model for Schottky-Barrier-type Graphene Nano-Ribbon Field-Effect Transistors (SB-GNRFETs). This is a physics-based analytical model for the current-voltage (I-V) characteristics of SB-GNRFETs. We carry out accurate approximations of Schottky barrier tunneling, channel charge and current, which provide improved accuracy while maintaining compactness. This SPICE-compatible compact model surpasses the existing model [15] in accuracy, and enables efficient circuit-level simulations of futuristic GNRFET-based circuits. The proposed model considers various design parameters and process variation effects, including graphene-specific edge roughness, which allows complete and thorough exploration and evaluation of SB-GNRFET circuits. We are able to model both single- and double-gate SB-GNRFETs, so we can evaluate and compare these two types of SB-GNRFET. We also compare circuit-level performance of SB-GNRFETs with multi-gate (MG) Si-CMOS for a scalability study in future generation technology. Our circuit simulations indicate that SB-GNRFET has an energy-delay product (EDP) advantage over Si-CMOS; the EDP of the ideal SB-GNRFET (assuming no process variation) is ~1.3% of that of Si-CMOS, while the EDP of the non-ideal case with process variation is 136% of that of Si-CMOS. Finally, we study technology scaling with SB-GNRFET and MG Si-CMOS. We show that the EDP of ideal (non-ideal) SB-GNRFET is ~0.88% (54%) EDP of that of Si-CMOS as the technology nodes scales down to 7 nm.
    Design Automation and Test in Europe; 01/2014
  • [Show abstract] [Hide abstract]
    ABSTRACT: Graphene Nano-Ribbon Field-Effect Transistors (GNR-FETs) have emerged as promising next-generation devices. In particular, Schottky-barrier-type GNRFETs (SB-GNRFETs) have piqued interest due to their ambipolar I-V characteristics. Despite manufacturing successes, the lack of a SPICE-compatible compact model of SB-GNRFETs has hindered studies on evaluating the performance of this emerging technology on the circuit level. In this paper, we present the first SPICE-compatible model of SB-GNRFETs that takes various design parameters into account, which not only enables circuit-level simulations, but also provides a means to evaluate process variation, including effects of channel length, transistor width, oxide thickness, and graphene-specific edge roughness. With this model, we are able to explore the design space of SB-GNRFETs, evaluate delay and power performance of SB-GNRFET circuits, and compare them with conventional Si-CMOS and Metal-Oxide-Semiconductor-(MOS-)GNRFETs. Our study shows that SB-GNRFETs have higher speed and higher power dissipation, and have lower energy delay product than both Si-CMOS and MOS-GNRFETs, while MOS-GNRFETs are potentially good for low-power applications despite the presence of graphene-metal contact resistance that are not present in SB-GNRFET circuits. Two practical factors severely degrade the performance and even affect the functionality of SB-GNRFET circuits: 1) edge roughness and 2) limitation on operating point shifting.
    2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH); 07/2013

Full-text (2 Sources)

Available from
May 26, 2014