Conference Paper

Semi-analytical model for Schottky-barrier carbon nanotube and graphene nanoribbon transistors

DOI: 10.1145/1785481.1785538 Conference: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010
Source: DBLP


This paper describes a physics-based semi-analytical model for Schottky-barrier carbon nanotube (CNT) and graphene nanoribbon (GNR) transistors. The model includes the treatment of (i) both tunneling and thermionic currents, (ii) ambipolar conduction, i.e., both electron and hole current components, (iii) ballistic transport, and (iv) multi-band propagation. Further, it reduces the computational complexity in the two critical and time-consuming steps, namely the calculation of the tunneling probability and the self-consistent evaluation of the the surface potential in the channel. When validated against NanoTCAD ViDES, a quantum transport simulation framework based on the non-equilibrium Green's function method, it is several orders of magnitude faster without significant loss in accuracy. Since the model is physics-based, it is parameterizable and can be used to study the effect of common parametric variations in CNT diameter and GNR width, Schottky-barrier height, and insulator thickness.

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Available from: Gianluca Fiori,
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    • "The interface between the metal drain/source and the GNR channel results in a SB at the graphene-metal junction. SB-GNRFETs have an ambipolar I –V curve with minimum current at V GS = 1/2V DS [12], [13]. Multiple GNRs can be connected in parallel to increase driving strength, as in Fig. 2(a). "

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    ABSTRACT: Graphene Nano-Ribbon Field-Effect Transistors (GNR-FETs) have emerged as promising next-generation devices. In particular, Schottky-barrier-type GNRFETs (SB-GNRFETs) have piqued interest due to their ambipolar I-V characteristics. Despite manufacturing successes, the lack of a SPICE-compatible compact model of SB-GNRFETs has hindered studies on evaluating the performance of this emerging technology on the circuit level. In this paper, we present the first SPICE-compatible model of SB-GNRFETs that takes various design parameters into account, which not only enables circuit-level simulations, but also provides a means to evaluate process variation, including effects of channel length, transistor width, oxide thickness, and graphene-specific edge roughness. With this model, we are able to explore the design space of SB-GNRFETs, evaluate delay and power performance of SB-GNRFET circuits, and compare them with conventional Si-CMOS and Metal-Oxide-Semiconductor-(MOS-)GNRFETs. Our study shows that SB-GNRFETs have higher speed and higher power dissipation, and have lower energy delay product than both Si-CMOS and MOS-GNRFETs, while MOS-GNRFETs are potentially good for low-power applications despite the presence of graphene-metal contact resistance that are not present in SB-GNRFET circuits. Two practical factors severely degrade the performance and even affect the functionality of SB-GNRFET circuits: 1) edge roughness and 2) limitation on operating point shifting.
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