A Study on the Design of Floating-Point Functions in FPGAs.
ABSTRACT Floating-Point Operations represent a common task in a variety of applications, but such operations often result in a bottleneck,
due to the large number of machine cycles required to compute them. Even though the FPGA community has developed advanced
algorithms to improve the speed of FLOPs, floating-point transcendental functions are still underdeveloped. In this paper,
we discuss some of the tradeoffs faced when implementing floating-point functions in FPGAs. These techniques, including lookup
tables, and CORDIC algorithms, have been used in the past for the implementation of fixed-point analytic functions. This paper
seeks to apply those methods to floating-point functions. The implementation results from different versions of a floating-point
sine function are summarized in terms of speed, area, and accuracy to understand the effect of different architectural alternatives.
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ABSTRACT: Les circuits reconfigurables FPGA ont désormais une capacité telle qu'ils peuvent être utilisés à des tâches d'accélération de calcul en virgule flottante. La littérature (et depuis peu les constructeurs) proposent des opérateurs pour les quatre opérations. L'étape suivante est de proposer des opérateurs pour les fonctions élémentaires les plus utilisées. Parmi celles-ci, nous proposons des architectures dédiées pour l'évaluation des fonctions exponentielles, logarithme, sinus et cosinus, et étudions les compromis possibles. Pour chacune de ces fonctions, un seul de ces opérateurs surpasse d'un facteur dix les processeurs généralistes en terme de débit, tout en occupant une fraction des ressources matérielles du FPGA. Tous ces opérateurs sont disponibles librement sur http://www.ens-lyon.fr/LIP/Arenaire/.Techniques et sciences informatiques 07/2008; DOI:10.3166/tsi.27.673-698
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ABSTRACT: As FPGAs are increasingly being used for floating-point computing, the feasi-bility of a library of floating-point elementary functions for FPGAs is discussed. An initial implementation of such a library contains parameterized operators for the logarithm and exponential functions. In single precision, those operators use a small fraction of the FPGA's resources, have a smaller latency than their software equivalent on a high-end processor, and provide about ten times the throughput in pipelined version. Previous work had shown that FPGAs could use massive parallelism to balance the poor performance of their basic floating-point operators compared to the equivalent in processors. As this work shows, when evaluating an elementary function, the flexibility of FPGAs provides much better performance than the processor without even resorting to parallelism. The presented library is freely available from http://www.ens-lyon.fr/LIP/Arenaire/.Microprocessors and Microsystems 12/2007; 31:537-545. DOI:10.1016/j.micpro.2006.02.008 · 0.60 Impact Factor
Conference Paper: Floating-Point Trigonometric Functions for FPGAs[Show abstract] [Hide abstract]
ABSTRACT: Field-programmable circuits now have a capacity that allows them to accelerate floating-point computing, but are still missing core libraries for it. In particular, there is a need for an equivalent to the mathematical library (libm) available with every processor and providing implementations of standard elementary functions such as exponential, logarithm or sine. This is all the more important as FPGAs are able to outperform current processors for such elementary functions, for which no dedicated hardware exists in the processor. FPLibrary, freely available from www.ens-lyon.fr/LIP/Arenaire/, is a first attempt to address this need for a mathematical library for FPGAs. This article demonstrates the implementation, in this library, of high-quality operators for floating-point sine and cosine functions up to single-precision. Small size and high performance are obtained using a specific, hardware-oriented algorithm, and careful datapath optimisation and error analysis. Operators fully compatible with the standard software functions are first presented, followed by a study of several more cost-efficient variants.Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on; 09/2007