Conference Paper

Soft IP Protection: Watermarking HDL Codes.

DOI: 10.1007/978-3-540-30114-1_16 Conference: Information Hiding, 6th International Workshop, IH 2004, Toronto, Canada, May 23-25, 2004, Revised Selected Papers
Source: DBLP

ABSTRACT Intellectual property (IP) reuse based design is one of the most promising techniques to close the so-called design productivity gap. To facilitate better IP reuse, it is desirable to have IPs exchanged in the soft form such as hardware description language (HDL) source codes. However, soft IPs have higher protection requirements than hard IPs and most existing IP protection techniques are not applicable to soft IPs. In this paper, we describe the basic requirements, make the neces- sary assumptions, and propose several practical schemes for HDL code protection. We protect the HDL codes by hiding author's signature also called as watermarking, similar to the idea for hard IP and multimedia data pro- tection. But the new challenge is how to embed watermark into HDL source codes, which must be properly documented and synthesizable for reuse. We leverage the unique feature of Verilog HDL design to develop several watermarking techniques. These techniques can protect both new and existing Verilog designs. We watermark SCU-RTL & ISCAS bench- mark Verilog circuits, as well as a MP3 decoder. Both original and water- marked designs are implemented on ASICs & FPGAs. The results show that the proposed techniques survive the commercial synthesis tools and cause little design overhead in terms of area/resources, delay and power.

0 Bookmarks
 · 
66 Views
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: IP reuse is rapidly proliferating recent automated circuit design. It is facing serious challenges like forgery, theft and misappropriation of intellectual property (IP) of the design. Thus, protection of design IP is a matter of prime concern. In this paper, we propose a novel Internet-based scheme to tackle this problem. Input to the proposed scheme is a graph corresponding to a digital system design. Watermarking of the graph and its encryption are achieved using a new linear feedback shift register(LFSR)-based locking scheme. The proposed scheme makes unauthorized disclosure of valuable design almost infeasible, and can easily detect any alteration of the design file during transmission. It ensures authentication of the original designer as well as non-repudiation between the seller and the buyer. Empirical evidences on several benchmark problem sets are encouraging.
    Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, SBCCI 2009, Natal, Brazil, August 31 - September 03, 2009; 01/2009
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: Fabrication and design are now performed by different companies as semiconductor fabrication facilities (fabs or foundries) seek to reduce costs by serving multiple clients and consolidating resources. However, lack of immediate control and observation reduces the trust which IC designers have in some fabs. To help fabs increase trust in their processes, we propose an approach for logging forensic information of the fab process and printing the information on chips so that examination of the chip reveals provable deviations from the design. Fab owners can benefit by catching rogue employees and by demonstrating high security standards to their customers. Our proposed solution uses a light runtime system that interacts with a trusted platform module (TPM).
    Technologies for Homeland Security (HST), 2010 IEEE International Conference on; 12/2010
  • [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, a simple and efficient watermarking method for soft IP protection is proposed, in which a special watermark module for copyright detection is added to the original hardware description language (HDL) codes to replace a set of selected stable register data. The watermark can survive after synthesis, placement and routing to protect the soft IP core at various design levels. The reliability and robustness analysis indicate the proposed method can resist both the removal attacks and forging attacks. Also the experiment results demonstrate that our method is easier to implement at a low hardware overhead compared with the other methods, and the embedded watermark can be detected easily for copyright authentication. Moreover, it could be conveniently integrated in real soft IP cores. test circuit is an independent module that can be removed easily. In this paper, a new watermarking method of additional- circuit-based is proposed for soft IP cores protection, in which a watermarking module is added in the original circuit to prove the ownership rights of the IP provider. The additional module can switch between two working modes: normal operating mode and watermark generating mode. In normal operating mode, the output information is the selected register data which involve in the arithmetic of the primary circuit. It makes the watermark module can't be removed directly. The ownership rights can be checked according to the output sequence of the additional module working in the watermark generating mode. Experiments are performed to verify the feasibility of the proposed method. The results demonstrate that this method has low hardware overhead and good detectability. The rest of the paper is organized as follows. In Section II, the proposed watermarking method is described in details and the implementation procedure of the scheme are given. the experiment results are shown in Section III. Section IV analysis of the typical attacks and evaluation of the reliability and robustness of the watermark is also described. In the last section, the conclusions of this paper are stated.
    01/2011;

Full-text

View
0 Downloads