Article

A Practical Implementation of Parallel Dynamic Load Balancing for Adaptive Computing in VLSI Device Simulation.

Eng. Comput. (Lond.) 01/2002; 18:124-137.
Source: DBLP
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    Article: A Study of the Threshold Voltage Variations for Ultrathin Body Double Gate SOI MOSFETs
    Chien-Shao Tang, Shih-Ching Lo, Jam-Wem Lee, Jyun-Hwei Tsai, Yiming Li
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    ABSTRACT: Silicon on insulator (SOI) devices have been of great interest in these years. In this paper, simulation with density-gradient transport model is performed to examine the variation of threshold voltage (V TH) for double gate SOI MOSFETs. Different thickness of silicon (Si) film, oxide thickness, channel length and doping concentration are considered in this work. According to the numerical study, both drift-diffusion (DD) and density gradient (DG) models demonstrate that the thickness of Si film greatly affects the threshold voltage (5 ~ 15 % variation). It is found that the thickness of Si film decreases, V TH variation increases; and the dependence relation is nonlinear. Therefore, this effect must be taken into account for the realization of double gate SOI ULSI circuit.
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Yiming Li