Article

A novel synchronization scheme for grid-connected converters by using adaptive linear optimal filter based PLL (ALOF-PLL).

Simulation Modelling Practice and Theory 01/2009; 17:1299-1345. pp.1299-1345
Source: DBLP
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    Article: Design and Tuning of a Modified Power-Based PLL for Single-Phase Grid-Connected Power Conditioning Systems
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    ABSTRACT: One of the most important aspects for the proper op-eration of the single-phase grid-tied power-conditioning systems is the synchronization with the utility grid. Among various synchro-nization techniques, phase locked loop (PLL)-based algorithms have found a lot of interest for the advantages they present. Typ-ically, the single-phase PLLs use a sinusoidal multiplier as the phase detector (PD). These PLLs are generally referred to as the power-based PLL (pPLL). In this paper, the drawbacks associated with the pPLL technique (i.e., the sensitivity to the grid voltage variations, and the double-frequency oscillations that appear in the estimated phase/frequency) are discussed in detail, and some of the previously reported solutions are examined. Then, to over-come these drawbacks, a simple and effective technique, called the double-frequency and amplitude compensation (DFAC) method is proposed. The effectiveness of the proposed method is evalu-ated through a detailed mathematical analysis. A systematic design method to fine-tune the PLL parameters is then suggested, which guarantees a fast transient response, a high disturbance rejection capability, and a robust performance. Finally, the simulation and experimental results are presented, which highlight the effective-ness of the proposed PLL. Index Terms—Frequency estimation, phase estimation, phase-locked loop (PLL), power-based PLL (pPLL), single phase grid-connected converters, synchronization.
    IEEE Transactions on Power Electronics 01/2012; 27. · 4.65 Impact Factor
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    Article: Design-Oriented Study of Advanced Synchronous Reference Frame Phase-Locked Loops
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    ABSTRACT: In grid-connected applications, the synchronous ref-erence frame phase-locked loop (SRF-PLL) is a commonly used synchronization technique due to the advantages it offers such as ease of implementation and robust performance. Un-der ideal grid conditions, the SRF-PLL enables a fast and accu-rate phase/frequency detection; however, unbalanced and distorted grid conditions highly degrade its performance. To overcome this drawback, several advanced PLLs have been proposed, such as the multiple reference frame-based PLL, the dual second-order gener-alized integrator-based PLL, and the multiple complex coefficient filter-based PLL. In this paper, a comprehensive design-oriented study of these advanced PLLs is presented. The starting point of this study is to derive the small-signal model of the aforementioned PLLs, which simplifies the parameter design and the stability anal-ysis. Then, a systematic design procedure to fine tune the PLLs pa-rameters is presented. The stability margin, the transient response, and the disturbance rejection capability are the key factors that are considered in the design procedure. Finally, the experimental re-sults are presented to support the theoretical analysis. Index Terms—Dual second-order generalized integrator (DSOGI), multiple complex coefficient filter (MCCF), multiple reference frame (MRF), phase-locked loop (PLL), synchronous reference frame (SRF), synchronization, three-phase grid-connected converters.
    IEEE Transactions on Power Electronics 01/2013; 28. · 4.65 Impact Factor

Yang Han