A Low-Power Multithreaded Processor for Software Defined Radio

Journal of VLSI Signal Processing (Impact Factor: 0.73). 06/2006; 43(2-3):143-159. DOI: 10.1007/s11265-006-7267-1
Source: DBLP


Embedded digital signal processors for software defined radio have stringent design constraints including high computational
bandwidth, low power consumption, and low interrupt latency. Furthermore, due to rapidly evolving communication standards
with increasing code complexity, these processors must be compiler-friendly, so that code for them can quickly be developed
in a high-level language. In this paper, we present the design of the Sandblaster Processor, a low-power multithreaded digital
signal processor for software defined radio. The processor uses a unique combination of token triggered threading, powerful
compound instructions, and SIMD vector operations to provide real-time baseband processing capabilities with very low power
consumption. We describe the processor’s architecture and microarchitecture, along with various techniques for achieving high
performance and low power dissipation. We also describe the processor’s programming environment and the SB3010 platform, a
complete system-on-chip solution for software defined radio. Using a super-computer class vectorizing compiler, the SB3010
achieves real-time performance in software on a variety of communication protocols including 802.11b, GPS, AM/FM radio, Bluetooth,
GPRS, and WCDMA. In addition to providing a programmable platform for SDR, the processor also provides efficient support for
a wide variety of digital signal processing and multimedia applications.

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