Article

Algorithm 856: APPSPACK 4.0: asynchronous parallel pattern search for derivative-free optimization.

ACM Transactions on Mathematical Software (Impact Factor: 1.93). 01/2006; 32:485-507. DOI: 10.1145/1163641.1163647
Source: DBLP

ABSTRACT APPSPACK is software for solving unconstrained and bound-constrained optimization problems. It implements an asynchronous parallel pattern search method that has been specifically designed for problems characterized by expensive function evaluations. Using APPSPACK to solve optimization problems has several advantages: No derivative information is needed; the procedure for evaluating the objective function can be executed via a separate program or script; the code can be run serially or in parallel, regardless of whether the function evaluation itself is parallel; and the software is freely available. We describe the underlying algorithm, data structures, and features of APPSPACK version 4.0, as well as how to use and customize the software.

0 Bookmarks
 · 
121 Views
  • [Show abstract] [Hide abstract]
    ABSTRACT: Optimization is often used to perform model calibration, the process of inferring the values of model parameters so that the results of the simulations best match observed behavior. It can both improve the predictive capability of the model and curtail the loss of information caused by using a numerical model instead of the actual system. At its heart is the comparison of experimental data and simulation results. Complicating this comparison is the fact that both data sets contain uncertainties which must be quantified in order to make reasonable comparisons. Therefore, uncertainty quantification (UQ) techniques can be applied to identify, characterize, reduce, and, if possible, eliminate uncertainties. Incorporation of UQ into the calibration process can drastically improve the usefulness of computational models. Current approaches are serial approaches in that first, the calibration parameters are identified and then, a series of runs dedicated to UQ analysis is completed. Although this approach can be effective, it can be computationally expensive or produce incomplete results. Model analysis that takes advantage of intermediate optimization iterates can reduce the expense, but the sampling done by the optimization algorithms is not ideal. In this paper, we will review serial approaches and propose a joint calibration and UQ approach that combines Bayesian statistical models and derivative-free optimization in order to monitor sensitivity information throughout the calibration process.
    Journal of Computational Methods in Sciences and Engineering 01/2012; 12(1-2):99-110.
  • Source
    [Show abstract] [Hide abstract]
    ABSTRACT: This work combines pattern search optimization with a statistical emulator based on Treed Gaussian Processes (TGP) to create a new hybrid algorithm. The goal is to use the global probabilistic view provided by TGP to inform the local pattern search and form a more intelligent optimization algorithm. We also propose ways in which the emulator can be used to gain information about the objective function, inform the algorithm stopping rules and provide a probabilistic analysis of the type of convergence. We present the algorithm, a framework for statistically informed optimization, and illustrate the work with numerical results.
  • [Show abstract] [Hide abstract]
    ABSTRACT: Modern IC power delivery systems encompass large on-chip passive power grids and active on-chip or off-chip voltage converters and regulators. While there exists little work targeting on holistic design of such complex IC subsystems, the optimal system-level design of power delivery is critical for achieving power integrity and power efficiency. In this article, we conduct a systematic design analysis on power delivery networks that incorporate Buck Converters (BCs) and on-chip Low-Dropout voltage regulators (LDOs) for the entire chip power supply. The electrical interactions between active voltage converters, regulators as well as passive power grids and their influence on key system design specifications are analyzed comprehensively. With the derived design insights, the system-level codesign of a complete power delivery network is facilitated by a proposed automatic optimization flow in which key design parameters of buck converters and on-chip LDOs as well as on-chip decoupling capacitance are jointly optimized. The experimental results demonstrate significant performance improvements resulted from the proposed system cooptimization in terms of achievable area overhead, supply noise and power efficiency. Impacts of different decoupling capacitance technologies are also investigated.
    ACM Transactions on Design Automation of Electronic Systems (TODAES). 03/2013; 18(2).

Full-text (4 Sources)

Download
46 Downloads
Available from
May 27, 2014