A proposed adiabatic logic called Energy Recovery Complementary Pass-transistor Logic (ERCPL) is presented in this paper. It operates with a two-phase nonoverlapping power-clock supply. It uses bootstrapping to achieve efficient power saving and eliminates any nonadiabatic losses on the charge-steering devices. A scheme is used to recover part of the energy trapped in the bootstrapping nodes. We compare the energy dissipation between ERCPL and other logic circuits by simulation. Simulation results show that a pipelined ERCPL carry look-ahead adder can achieve a power reduction of 80% over the conventional CMOS case. Operation of an 8-bit ERCPL CLA fabricated using the TSMC 0.35 μm 1P4M CMOS technology has been experimentally verified.
[Show abstract][Hide abstract] ABSTRACT: Adiabatic switching is an approach to low-power digital circuits that differs fundamentally from other practical low-power techniques. When adiabatic switching is used, the signal energies stored on circuit capacitances may be recycled instead of dissipated as heat. We describe the fundamental adiabatic amplifier circuit and analyze its performance. The dissipation of the adiabatic amplifier is compared to that of conventional switching circuits, both for the case of a fixed voltage swing and the case when the voltage swing can be scaled to reduce power dissipation. We show how combinational and sequential adiabatic-switching logic circuits may be constructed and describe the timing restrictions required for adiabatic operation. Small chip-building experiments have been performed to validate the techniques and to analyse the associated circuit overhead.< >
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 01/1995; 2(4-2):398 - 407. DOI:10.1109/92.335009 · 1.36 Impact Factor
[Show abstract][Hide abstract] ABSTRACT: An NMOS energy recovery logic (NERL) scheme is introduced which
exhibits high throughput with low energy consumption due to efficient
energy transfer and recovery using adiabatic logic and bootstrapping.
NERL achieves dramatic energy savings, insensitive to output load
capacitance and is less dependent on the power-clock frequency
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