A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays.

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IEICE TRANS. FUNDAMENTALS, VOL.E89–A, NO.12 DECEMBER 2006
PAPER
A Sampling Switch Design Procedure for Active Matrix Liquid
Crystal Displays
Special Section on VLSI Design and CAD Algorithms
Shingo TAKAHASHI†, Affiliate Member, Shuji TSUKIYAMA†a), Masanori HASHIMOTO††, Members,
and Isao SHIRAKAWA†††, Fellow, Honorary Member
SUMMARY
play), the ratio of the pixel voltage to the video voltage (RPV) of a pixel is
an important factor of the performance of the LCD, since the pixel voltage
of each pixel determines its transmitted luminance. Thus, of practical im-
portance is the issue of how to maintain the admissible allowance of RPV
of each pixel within a prescribed narrow range. This constraint on RPV
is analyzed in terms of circuit parameters associated with the sampling
switch and sampling pulse of a column driver in the LCD. With the use
of a minimal set of such circuit parameters, a design procedure is described
dedicatedly for the sampling switch, which intends to seek an optimal sam-
pling switch as well as an optimal sampling pulse waveform. A number
of experimental results show that an optimal sampling switch attained by
the proposed procedure yields a source driver with almost 18% less power
consumption than the one by manual design. Moreover, the percentage of
the RPVs within 100±1% among 270 cases of fluctuations is 88.1% for the
optimal sampling switch, but 46.7% for the manual design.
key words: active matrix LCD, CAD tool, column driver, sampling pulse,
sampling switch
In the design of an active matrix LCD (Liquid CrystalDis-
1.Introduction
LCDs (Liquid Crystal Displays) have established a firm
foothold on the market as flat panel displays, first for cal-
culators, subsequently for personal computers, mobile ap-
pliances, digital cameras, and so forth, and at present with
increasing importance for TVs. Thus, development is con-
tinuing further onimprovingthe picture qualityas wellason
the picture function of LCDs, and hence the design automa-
tion has to be enhanced more and more for column drivers
which affect most the performance of LCDs [1],[2].
In a TFT (Thin Film Transistor)-addressed LCD, usu-
ally called an active matrix LCD, as illustrated in Fig.1,
the grey shade of each pixel is controlled individually by
a designated pixel voltage. In each column driver, a pair
of nMOS TFT and pMOS TFT connected in parallel con-
stitutes a sampling switch, as shown in Fig.2, which is to
sample the video signal and then to transmit the signal to
the source line.
Manuscript received March 17, 2006.
Manuscript revised June 13, 2006.
Final manuscript received July 31, 2006.
†The authors are with the Dept. of Electrical, Electronic, and
Communication Eng., Chuo University, Tokyo, 112-8551 Japan.
††The author is with the Graduate School of Information Sci-
ence and Technology, Osaka University, Toyonaka-shi, 560-8531
Japan.
†††The author is with the Graduate School of Applied Informat-
ics, University of Hyogo, Kobe-shi, 650-0044 Japan.
a)E-mail: tsuki@elect.chuo-u.ac.jp
DOI: 10.1093/ietfec/e89–a.12.3538
Fig.1
Active matrix LCD.
Fig.2
Column driver in active matrix LCD.
During the period when all pixels in a row are activated
by a gate line, a video voltage is fed to each pixel in the
row from column to column so as to display a designated
gray shade, whereas all pixels in other rows are blocked by
grounding their gate lines. Thus, during this period each
column driver has to transmit a designated voltage to a pixel
in the row, one at a time from left to right, and hence the
Copyright c ? 2006 The Institute of Electronics, Information and Communication Engineers

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operation speed of a column driver is far greater than that
of a row driver. This implies that the column driver plays a
principal role to determine RPV (Ratio of Pixel voltage to
Video voltage) of each pixel.
Given a pixel, let Vvddenote the video voltage to be fed
to it, and let Vpxrepresent the pixel voltage. Thus for this
pixel we have RPV = (Vpx/Vvd) × 100[%]. Our ideal goal
is to make this RPV approach 100[%], or in other words, to
make each pixel attain the designated grey shade.
Recently, with the rapid advance of LCD technologies,
the column and row drivers have to be integrated more and
more finely on the same substrate as the picture plane [2]–
[4]. However, in such integration there occur considerable
fluctuations in circuit parameters, which make the design of
a column driver complicated, mainly from the aspect of the
functional capability as well as the reduction of the area and
power consumption.
This paper intends to construct a CAD tool for the col-
umn driver, aiming at the following objectives:
- Given a specified number B, maintain RPV within
100 ± B[%].
- Minimize the power consumption.
- Minimize the delay and fluctuation of the sampling
pulse from the system clock.
- Integrate each column driver within a given width.
To achieve these objectives, the most intensive work is to
construct a design procedure to determine the size of each
transistor in the column driver.
Since sampling switch and sampling pulse waveform
are most important in the column driver in order to achieve
the target RPV, we focus on them in this paper. The sub-
circuit consisting of a sampling switch and a pixel is a kind
of a sample-and-hold circuit [5] and has been considered in
the various applications [6]–[11] and also from the view-
point of modeling and analysis methods [12]. However, as
far as we know, there is no specific report treating a sam-
pling switch from the viewpoint of the quality of display.
Hence, in what follows, we consider a design procedure for
determining the size of sampling switch and the waveform
of sampling pulse with the use of a full transistor model (a
SPICE model) for a CMOS switch.
This paper first analyzes how the design parameters as-
sociated with the sampling switch and sampling pulse wave-
formarerelatedtoRPV,andthenselectsaminimalsetofpa-
rameters which contributes most to the behavior of RPV, by
taking into consideration various types of video signal feed-
ing to a pixel and fluctuations of design parameters. With
the use of such a set of parameters, a design procedure is de-
scribed for seeking an optimal TFT size and sampling pulse
waveform. In order to find an optimal size and waveform,
a circuit simulator such as SPICE simulation must be re-
peated for the sub-circuit consisting of a sampling switch
and a column of pixels, but the number of repetitions can be
reduced by using the minimal number of parameters. Ex-
perimental results are also shown to reveal that an optimal
sampling switch attained by this procedure gives rise to a
column driver with almost 18% less power consumption and
41.4 point better performance in fluctuations than the one by
manual design.
The proposed procedure requires some input values
such as ratios of fluctuations of design parameters, tim-
ing relations between video signals and sampling pulses,
and minimum and maximum possible widths of pMOS and
nMOS TFTs. If the design of a column driver starts from
scratch, it may be hard to give appropriate values to them,
although the procedure can be used in a cut-and-try man-
ner. Therefore, the procedure would be most effective for
the redesign of column drivers.
2. Preparations
2.1 Definitions of Symbols
First, design parameters associated with sampling switch
and sampling pulse waveform are discussed. Let Wnbe the
gate width of an nMOS TFT, and let SMP denote a sampling
pulse whichis input to the gate of this nMOS TFT, for which
the rising time, falling time, and intermediate time between
them are denoted by tr, tf, and tw, respectively (see Fig.1).
Similarly, let Wpbe the gate width of a pMOS TFT, and let
SMPB designate a sampling pulse input to the gate of this
pMOS TFT. For simplicity, let both of SMP and SMPB be
of the piece-wise linear waveforms, reverse to each other.
Thus, Wn, Wp, tr, tf, and twcan be regarded as the basic de-
sign parameters associated with sampling switch and SMP
(SMPB).
2.2 Types of Feeding
Although tr, tf, and tware common to SMP and SMPB, RPV
changes differently according to the combination of video
voltage Vvdand common electrode voltage Vcom, as outlined
below.
First, it should be remarked that the common elec-
trode voltage Vcomfor a row of pixels alternates between a
high voltage level Vcom−highand a low voltage level Vcom−low,
frame by frame. Hence, if signal Vcomis at Vcom−highwhen
a pixel receives a video signal, then next time it receives a
video signal when Vcomis at Vcom−low, and vice versa. If
Vcomof a row of pixels is set to the low level Vcom−low, then
the pixel voltage of each pixel in the row is lowered, and it
is raised to a given video voltage when the sampling switch
corresponding to a pixel in the row is open. This type of
feeding of a video signal to a pixel is designated as the plus
feeding. On the other hand, if Vcomis set to the high level
Vcom−high, then the pixel voltage of the row is raised, and it is
lowered to a given video voltage when the sampling switch
is open. This type of feeding is referred to as the minus
feeding.
Usually one type of feeding is more difficult than an-
other to make a pixel voltage equal to a designated video
voltage. Such a difficult feeding case can be found by ap-
plying the SPICE simulation to the sub-circuit consisting of
a sampling switch and a column of pixels with respect to a

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IEICE TRANS. FUNDAMENTALS, VOL.E89–A, NO.12 DECEMBER 2006
few typical values of circuit parameters. In fact, according
to experimental results, the minus feeding can happen to be
the difficult case, that is, the time from the beginning of tr
to the instance when pixel voltage Vpxapproaches enough
video voltage Vvdin the minus feeding is longer as com-
pared with the plus feeding. This difficult feeding case can
play an important role in determining the minimum values
Wp−minand Wn−minof Wpand Wn, respectively, as follows: If
widths Wpand Wnare less than Wp−minand Wn−min, respec-
tively, then RPV may be less than 100 − B[%] in a difficult
feeding case.
Note that the minimum values Wp−minand Wn−minde-
pend on the lengths of tr, tw, and tf, and it can be seen that
the task to find these minimum values is not an easy task.
However, the lower bound of the widths of TFTs in the sam-
pling switch can be estimated by repeated application of the
SPICE simulation to typical combinations of video voltage
Vvdand common electrode voltage Vcom.
2.3 Charge Injection
Even if pixel voltage Vpxreaches to a designated video volt-
age before the sampling switch turns off, Vpxmay change
by the so-called channel charge injection after the sampling
switch turns off [7]–[11]. This voltage change ∆Vpxdepends
on Wn, Wp, and source-gate voltage Vgsof TFT. If Vgsis con-
stant, then ∆Vpxcan be made equal to zero by imposing a
relation Wp= a·Wn+b for widths Wpand Wn. This relation
holds for practical ranges of Wpand Wn, and b is usually
small compared to the range of Wp. However, the coeffi-
cients a and b are constants depending on Vgs, and moreover
this Vgsvaries with video voltage Vvd. Hence it is impossi-
ble to make ∆Vpxequal to zero for any value of Vvdwithout
changing the circuit structure of the sampling switch.
The effect of charge injection has been considered in
various applications and proposed many techniques to re-
duce the effect [9]–[11]. However, our sampling switch is
assumed to be a simple CMOS switch, and only the widths
of TFTs can be changed. Therefore, we use the effect of
charge injection actively and effectively as shown below.
As described above, ∆Vpxcan be made equal to zero
for a particular voltage of Vvdby using an explicit relation
for Wnand Wp. Noting the nonlinear relation between the
transmitted luminance and pixel voltage Vpx, we can see
that there exists a pixel voltage Vpx−mdlwhich changes the
transmittedluminance moststeeply. Ifwe reducethe change
∆Vpxof the pixel voltage to zero at this voltage Vpx−mdl, then
the difference of the transmitted luminance caused by the
charge injection can be reduced as small as possible. There-
fore, we seek this voltage Vpx−mdl, and by using the source-
gate voltage Vgsattained by Vpx−mdl, we find constants a and
b which reduce ∆Vpxto 0.
The values a and b are obtained by finding two pairs
(Wn,Wp) satisfying ∆Vpx= 0 for large and small values of
Wn. For a given Wn, Wpsatisfying ∆Vpx= 0 can be calcu-
lated by a binary search. Namely, if ∆Vpxcalculated for a
pair (Wn,Wp) is negative, then Wpmust be increased, and
otherwise, it is decreased. The voltage change ∆Vpxis com-
puted by SPICE by turning off the sampling switch with a
fully charged pixel. Since the relation Wp = a · Wn+ b is
imposed on Wpand Wn, a set of basic design parameters for
the sampling switch can be reduced to {Wn,tr,tf,tw}.
Since ∆Vpxis zero only at this Vpx−mdl, at another video
voltage Vvdwhich does not attain the pixel voltage Vpx−mdl,
pixel voltage Vpx may change after the sampling switch
turns off. Therefore, due to the charge injection, it becomes
harder to satisfy the constraints on RPV for any video volt-
age Vvd. Moreover, it should be noted that ∆Vpxmay be
larger than 0 at a certain video voltage Vvd, and hence it may
happen that RPV exceeds 100+B[%]. This type of violation
can occur in the case when a pixel voltage is easy to reach
to a designated video voltage, that is, pixel voltage Vpxap-
proaches Vvdmore quickly than that in the difficult feeding
case.
Such an easy feeding case can play an important role
to determine the maximum value Wn−max of width Wn.
Namely, if width Wnis increased to satisfy the constraint
on RPV to be over 100 − B[%] in the difficult feeding case,
and if it exceeds Wn−max, then RPV may exceed 100+ B[%]
in the easy feeding case. Similarly as the minimum value
Wn−minof Wn, the maximum value Wn−maxof Wndepends
on the lengths of tr, tw, and tf, and hence is hard to compute.
But the upper bound of Wncan be estimated by repeated
application of the SPICE simulation.
2.4Fluctuations
As mentioned above, a variety of fluctuations in the design
parameters must be taken into account in the design of the
column driver for active matrix LCDs [2]–[4]. Hence, of
practical importance is the technical capability of how to
copewith thesefluctuations, suchastransistorperformances
(SPICE parameters), voltage sources, etc., in the design task
of the sampling switch. Henceforth, we assume the follow-
ing situations.
- Gate widths Wnand Wpfluctuate within Wn± σnand
Wp± σp, respectively.
- High and row voltage levels Vhighand Vlowof SMP
(SMPB) fluctuate within Vhigh± υhighand Vlow± υlow,
respectively. AlthoughsupplyvoltageVddandVssalso
fluctuate, these voltagesdo not appearexplicitly inthe
samplingswitch, andhencefluctuations ofVddandVss
are not treated directly in this paper.
- SPICE parameters of nMOS and pMOS TFTs fluc-
tuate among best, typical, and worst cases, and the
following five combinations of fluctuations occur:
nBpB, nTpT, nWpW, nBpW, and nWpB, where n and
p denote nMOS and pMOS, respectively, and B, T,
andW represent best, typical, andworst cases, respec-
tively.
Duetothe fluctuationsofsupplyvoltagesandtransistor
performances in Delay-Buffer, the waveforms of SMP and
SMPB also fluctuate. Now, assume that tr, tf, and twof SMP
(SMPB) fluctuate within tr·(1±εr), tf·(1±εf), and tw·(1±εw),

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respectively, where ε’s are positive decimals between 0 and
1. Moreover, SMPB delays from SMP and the delay fluc-
tuates within ±δ. In addition to these fluctuations, a time
parameter T indicating the time interval during which the
video signal keeps a voltage for a pixel, fluctuates within
T · (1 ± εT), where εTis also a positive decimal between 0
and 1. Note that T is the half of the period of the system
clock.
These ε’s and δ are determined by the performance
of Delay-Buffer generating SMP and SMPB. On the other
hand, the purpose of this paper is to find the conditions of
SMP and SMPB for the constraints on RPV to be satisfied,
and Delay-Buffer is designed with the use of these condi-
tions. Therefore, it seems to be a conflict to assume that
these ε’s and δ are given in this paper. However, these val-
ues can be estimated from design experiences or can be set
as design targets. Thus, we assume these ε’s and δ.
Due to the fluctuations, there arise various cases to
be considered, which are totally 270 = 2 × 3 × 3 × 3 × 5
cases, where 2 types of feeding (plus and minus), 3 video
voltages (high, middle, and low), 3 high voltages of SMP
(Vhigh−υhigh, Vhigh, and Vhigh+υhigh), 3 low voltages of SMP
(Vlow− υlow, Vlow, and Vlow+ υlow), and 5 combinations of
TFT fluctuations (nBpB, nTpT, nWpW, nBpW, and nWpB).
Hence the classification of difficult and easy feeding cases
stated above ceases to be definite. Thus, let us introduce
extended definitions of them as follows: For given Wnand
Wp= a·Wn+b, the case where RPV is the lowest or highest
value among all cases is called Case D or Case E, respec-
tively. Case D occurs when
- ∆Vpxis negative, or
- SMP and SMPB do not swing fully (i.e., Vhigh is
Vhigh− υhighand Vlowis Vlow+ υlow), and
- SPICE parameters are in the worst case,
and is used to determine Wn−min. On the other hand, Case E
occurs when
- ∆Vpxis positive, and
- SPCIE parameters are in the best case,
and is used to determine Wn−max.
Case D or Case E is not necessarily unique, and may
vary depending on Wn. Hence, in order to identify these
cases, RPVs are computed for 270 cases for the largest and
smallest values of Wn, and the top and bottom 10 cases for
each value of Wnare chosen and checked, from which can-
didates for Case D and Case E are selected. The largest and
smallest values of Wncan be obtained by using the width of
a column circuit of the column driver and the process tech-
nology, respectively. Since only the order of RPV values is
considered, the waveforms of SMP and SMPB do not affect
the selection of candidates for Case D and Case E.
2.5 Sampling Methods
As described before, when a row of pixels is activated by
a row driver, common electrode voltage Vcomof the row is
either raised or lowered, and in according with Vcom, pixel
voltage Vpxis also raised or lowered, respectively. In or-
Fig.3
Timing charts of simple and double samplings.
der to make Vpx of a pixel be close to the video voltage
level as quickly as possible, the so-called double sampling is
used, which opens the sampling switch of a pixel before the
video signal for the pixel is input. The ordinary sampling
method is called simple sampling, and the timing charts of
these sampling methods are shown in Fig.3.
As can be seen from the figure, the simple sampling
opens the sampling switch for the ith pixel only during
the time interval of T when the video signal holds volt-
age VIDEOi for the ith pixel; whereas the double sam-
pling opens the sampling switch for the ith pixel during the
time interval when the video signal holds VIDEOi−1for the
(i − 1)th pixel and keeps open during when the video signal
holds VIDEOifor the ith pixel.
3.Design Procedure
A design procedure for the sampling switch and sampling
pulse SMP (SMPB) is described in what follows.
3.1Waveforms of SMP and SMPB
First, it should be noticed that the longer is the opening pe-
riod of the sampling switch, the shorter Wnand Wpcan be
made, and moreover shortening Wnand Wpcan contribute
greatly to the area and power reduction of a column driver.
Hence, the pulse width of SMP (SMPB) should be made as
long as possible. Noting that trand tfare regulatedby Buffer
sub-circuit of Delay-Buffer but twby Delay sub-circuit, let
us determine twwith the use of the following equations in
order that the total pulse width tr+ tw+ tfof SMP (SMPB)
can be made as long as possible.
?The case of simple sampling?
(1+εr) · tr+(1+εw) · tw+(1+εf) · tf= T · (1−εT)
?The case of double sampling?
(1+εr) · tr+(1+εw) · tw+(1+εf) · tf= 2T · (1−εT) (2)
Using these equations, design parameters Wn, tr, tf, and
(1)

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IEICE TRANS. FUNDAMENTALS, VOL.E89–A, NO.12 DECEMBER 2006
twassociated with the sampling switch and SMP (SMPB)
can be reduced to a basic set {tr, tf, Wn} of three elements.
Thus the remaining task is to seek an optimal 3-tuple (tr,
tf, Wn) which satisfies the constraints on RPV. To devise an
algorithm for seeking such an optimal 3-tuple, we consider
the ranges of trand tf.
Let tr−minand tf−mindenote the minimum possible val-
ues of trand tf, respectively, which can be determined from
the case when a sampling switch with the minimal widths
TFTs is driven by Buffer with the maximal widths TFTs.
With the use of tr−minand tf−min, the lower bounds of trand
tfare set by tr−min/(1 − εr) and tf−min/(1 − εf), respectively.
Let ts2v be the time interval between the instance at
which SMP falls 50% down from Vhighand the instance at
which the video signal begins to change to the next pixel
video voltage (see Fig.3). Since video signal is an input
of column driver, ts2vis specified by designers. Since SMP
must fall down to the bottom and SMPB must rise up to
the top before the video signal begins to change to the next
pixelvideovoltage, tf/2 andδ+tf/2mustbe smaller thants2v.
From them, the upper bound of tfis obtained as 2(ts2v− δ).
The upper bound of trcan be obtained from the con-
dition that tr+ tfshould not exceed T. If tr+ tfbecomes
larger than T, SMP can not fully swing in the case of simple
sampling, andtwo consecutivesamplingswitchesturn onsi-
multaneously in the case of double sampling. In such cases,
it is very hard to satisfy the constraints on RPV. From these
observations, we have the ranges of trand tfas follows:
tf−min/(1 − εf) ≤ tf≤ 2 · (ts2v− δ)/(1 + εf).
tr−min/(1 − εr)≤tr≤{T · (1−εr)−tf· (1+εf)}/(1+εr).
(3)
(4)
3.2 Optimal Solution
Remark that the shorter is Wn, the greater is the area and
power reduction of the sampling switch, and hence Wnof an
optimal 3-tuple (tr, tf, Wn) must be minimal. On the other
hand, note that the longer are trand tf, the smaller are tran-
sistor widths in Delay-Buffer, contributing to its area reduc-
tion, andhencetrandtfofanoptimal3-tuple(tr, tf, Wn)must
be maximal. However, in order to satisfy the constraints on
RPV, shorter Wnrequires longer tw, and hence by Eq.(1)
or (2), trand tfshould be shorter. Therefore, there arises a
trade-off among tr, tf, and Wn. Moreover, since tr, tfand tw
must satisfy Eq.(1) or (2), there exists a trade-off between tr
and tf, too. Namely, if tris shortened, then tfcan be longer,
and vice versa.
To resolve these trade-offs precisely, Delay-Buffer, a
sampling switch, and a pixel must be considered all at once.
In this case, however, the number of design parameters be-
comes too large to pursue an optimal solution. Therefore,
in this paper only the sampling switch and SMP (SMPB)
are taken into account, for which a heuristic algorithm is
devised to seek an optimal 3-tuple (tr, tf, Wn).
For given SMP and SMPB, that is, for given tr, tw, tf,
and δ, let Wn−minand Wn−maxbe the minimum and maximum
Fig.4
Typical values of Wn−minand Wn−max.
values of Wnsuch that if Wn−min≤ Wn≤ Wn−maxthen RPV
is within 100 ± B[%] in any case. These Wn−minand Wn−max
are calculatedby means of SPICE simulation with the use of
candidatesforCaseDandCaseE,respectively. Infact, such
values of Wn−minand Wn−maxare sought as shown in Fig.4,
where the upper and lower surfaces at small trrepresent sets
of feasible values of (tr, tf, Wn−max) and (tr, tf, Wn−min), re-
spectively. The space between these two surfaces indicates a
set of feasible values (tr, tf, Wn), which satisfy the constraint
on RPV in any case. Thus there exists an optimum 3-tuple
(tr, tf, Wn) in this space.
Figure 4 shows that both Wn−maxand Wn−minincrease
according as trincreases, and two surfaces cross each other
when trbecomes large. Their reasons are as follows: For a
given tf, if trbecomes large, then twis shortened, and hence
it becomes hard for RPV to be raised to 100%. Therefore, in
Case D, Wn−minmust be widened so as to increase RPV over
100−B[%]. Moreover, in Case E, evenif ∆Vpxdue to charge
injection becomes large, RPV does not exceed 100%, sothat
Wn−maxincreases according as trincreases, since the larger
is Wn, the greater is ∆Vpx. However, this increase of Wn−max
is not so large as Wn−min, and hence Wn−minincreases more
steeply than Wn−max. Thus, according as trincreases, the
difference Wn−max−Wn−mindecreases monotonically, until it
reaches to zero.
In active matrix LCDs, RPV of a pixel is more sensi-
tive to the change of tfthan tr, and the range of tfis much
smaller than that of tr. Therefore, we set tfto be as large as
possible, that is, tf= 2 · (ts2v− δ)/(1 + εf), in order to make
the design of Delay-Buffer easier. Then, the problem to be
considered becomes the one to resolve the trade-off between
trand Wn. By taking into account the current technology of
LCD and tendency shown in Fig.4, this trade-off is resolved
as follows.