A statement based parallelizing framework for processor-in-memory architectures.

Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan, R.O.C.
Information Processing Letters (Impact Factor: 0.48). 02/2003; 85:159-163. DOI: 10.1016/S0020-0190(02)00353-8
Source: DBLP

ABSTRACT Given a collection of n functions defined on Rd, and a polyhedral set Q ⊂ Rd, we consider the problem of minimizing the sum of the k largest functions of the collection over Q. Specifically ...

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