Article: A high bit resolution FPGA implementation of a FNN with a new algorithm for the activation function.Neurocomputing. 01/2007; 71:71-77.
Conference Proceeding: Artificial Neural Networks Processor - A Hardware Implementation Using a FPGA.Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings; 01/2004
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ABSTRACT: Artificial Neural Networks can benefit from digital implementation and several implementations have already been reported in scientific papers. Nevertheless, these implementations do not allow the direct use of off-line trained networks because of the much lower precision when compared with the software solutions where they are prepared or modifications in the activation function. The present work proposes a hardware solution called Artificial Neural Network Processor, using a FPGA that fits the requirements for a direct implementation of Feedforward Neural Networks, because of the high resolution and accurate activation function that were obtained. The resulting hardware solution is tested with data from a real system to confirm that it can correctly implement the models prepared off-line with MATLAB.