Publications

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    ABSTRACT: The authors report on the structural and electrical properties of TiN/Al2O3/TiN metal–insulator–metal (MIM) capacitor structures in submicron three-dimensional (3D) trench geometries with an aspect ratio of ∼30. A simplified process route was employed where the three layers for the MIM stack were deposited using atomic layer deposition (ALD) in a single run at a process temperature of 250 °C. The TiN top and bottom electrodes were deposited via plasma-enhanced ALD using a tetrakis(dimethylamino)titanium precursor. 3D trench devices yielded capacitance densities of 36 fF/μm2 and quality factors >65 at low frequency (200 Hz), with low leakage current densities (<3 nA/cm2 at 1 V). These devices also show strong optical iridescence which, when combined with the covert embedded capacitance, show potential for system in package (SiP) anticounterfeiting applications.
    Journal of Vacuum Science & Technology A Vacuum Surfaces and Films 01/2015; 33(1):01A103-01A103-5. · 1.43 Impact Factor
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    ABSTRACT: The metal-organic Cu(I) complex 1,3-diisopropyl-imidazolin-2-ylidene copper hexamethyl disilazide has been tested as a novel oxygen-free precursor for atomic layer deposition of Cu with molecular hydrogen. Being a strong Lewis base, the carbene stabilizes the metal centre to form a monomeric compound that can be vaporised and transported without visible degradation. A significant substrate dependence of the growth process not only with respect to the film material but also to the structure of the films was observed. On Pd surfaces continuous films are grown and no phase boundary can be observed between the Cu film and the Pd, while island growth is observed on Ru substrates, which as a consequence requires thicker films in order to achieve a fully coalesced layer. Island growth is also observed for ultra-thin (<10 nm) Pd layers on Si substrates. Possible explanations for the different growth modes observed are discussed.
    J. Mater. Chem. C. 09/2014;
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    ABSTRACT: Combined in situ IR measurements and first-principles calculations of InP(100) surfaces reveal that mild annealing (300 °C), typically needed for atomic layer deposition, leads to the formation of InP-derived surface hydrophosphate species (both P═O and P–OH sites). The initial interaction of trimethylaluminum at 300 °C results in the formation of P–O–Al linkages through covalent and dative bonding by reaction with surface hydroxyls. During subsequent ALD cycles to deposit Al2O3, an interfacial layer composed of P–O–Al bonds (1140 cm–1) is formed, requiring approximately seven cycles for completion. Similar chemical transformations are observed on hydrofluoric acid and ammonium-sulfide treated [HF/(NH4)2S] surfaces but to a lesser degree since the oxide thickness is reduced, requiring only approximately three cycles to fully complete the interfacial layer. Initially, the ALD growth of Al2O3 is slower on the HF/(NH4)2S-treated InP(100) surface than on the native oxide surface due to a lower density of hydroxyl groups. However, this slow growth leads to a denser film, highlighting the importance of the chemical composition of the initial InP(100) substrate.
    The Journal of Physical Chemistry C. 03/2014; 118(11):5862–5871.
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    ABSTRACT: A method which combines polymer particle assembly, chemical infiltration and etching with an aerosol assisted deposition process is described for the fabrication of 3D inverse opal (IO) structures with sub-micron periodicity and precision. This procedure not only overcomes limitations associated with slow, expensive micro-fabrication methods but also permits the tuning of refractive index contrast via the direct incorporation of photonically-active, preformed, tailored silicon nanostructures. It is demonstrated that this approach can be used to modify the photonic band gap (PBG) by effectively depositing/patterning optically active silicon nanocrystals (ncSi) onto the pore walls of a 3D inverse opal structure. This simple, yet effective method for preparing functional complex 3D structures has the potential to be used generically to fabricate a variety of functional porous 3D structures that could find application not only in new or improved photonic crystal (PC) devices but also in areas such as catalysis, separation, fuel cells technology, microelectronics and optoelectronics.
    J. Mater. Chem. C. 02/2014; 2(9).
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    ABSTRACT: A design of experiments methodology was used to optimize the sheet resistance of titanium nitride (TiN) films produced by plasma-enhanced atomic layer deposition (PE-ALD) using a tetrakis(dimethylamino)titanium precursor in a N2/H2 plasma at low temperature (250 °C). At fixed chamber pressure (300 mTorr) and plasma power (300 W), the plasma duration and N2 flow rate were the most significant factors. The lowest sheet resistance values (163 Ω/sq. for a 20 nm TiN film) were obtained using plasma durations ∼40 s, N2 flow rates >60 standard cubic centimeters per minute, and purge times ∼60 s. Time of flight secondary ion mass spectroscopy data revealed reduced levels of carbon contaminants in the TiN films with lowest sheet resistance (163 Ω/sq.), compared to films with higher sheet resistance (400–600 Ω/sq.) while transmission electron microscopy data showed a higher density of nanocrystallites in the low-resistance films. Further significant reductions in sheet resistance, from 163 Ω/sq. to 70 Ω/sq. for a 20 nm TiN film (corresponding resistivity ∼145 μΩ·cm), were achieved by addition of a postcycle Ar/N2 plasma step in the PE-ALD process.
    Journal of Vacuum Science & Technology A Vacuum Surfaces and Films 01/2014; 32(3):031506-031506-6. · 1.43 Impact Factor
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    ABSTRACT: Diffusion of indium through HfO2 after post deposition annealing in N2 or forming gas environments is observed in HfO2/In0.53Ga0.47As stacks by low energy ion scattering and X-ray photo electron spectroscopy and found to be consistent with changes in interface layer thickness observed by transmission electron microscopy. Prior to post processing, arsenic oxide is detected at the surface of atomic layer deposition-grown HfO2 and is desorbed upon annealing at 350 °C. Reduction of the interfacial layer thickness and potential densification of HfO2, resulting from indium diffusion upon annealing, is confirmed by an increase in capacitance.
    Applied Physics Letters 12/2013; 104(1). · 3.52 Impact Factor
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  • 224th ECS Meeting; 10/2013
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    ABSTRACT: The junctionless nanowire metal–oxide–semiconductor field‐effect transistor (JNT) has recently been proposed as an alternative device for sub‐20‐nm nodes. The JNT architecture eliminates the need for forming PN junctions, resulting in simple processing and competitive electrical characteristics. In order to further boost the drive current, alternative channel materials such as III–V and Ge, have been proposed. In this Letter, JNTs with Ge channels have been fabricated by a CMOS‐compatible top–down process. The transistors exhibit the lowest subthreshold slope to date for JNT with Ge channels. The devices with a gate length of 3 μm exhibit a subthreshold slope (SS) of 216 mV/dec with an I ON/I OFF current ratio of 1.2 × 103 at V D = –1 V and drain‐induced‐barrier lowering (DIBL) of 87 mV. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim) This Letter describes the fabrication of junctionless nanowire transistors (JNT) with Ge channel. The simplified process without forming PN juntions is very suitable for Ge, which is a promising channel material to boost the drain current. The fabricated transistors exhibit the lowest subthreshold slope to date for JNT with Ge channels. The devices with a gate length of 3 μm exhibit a subthreshold slope (SS) of 216 mV/dec with an I ON/I OFF current ratio of 1.2×103 at V D = –1 V and drain‐induced‐barrier‐lowing (DIBL) of 87 mV.
    physica status solidi (RRL) - Rapid Research Letters 10/2013; · 2.39 Impact Factor
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    ABSTRACT: Future high energy astrophysics missions will require high performance novel X-ray optics to explore the Universe beyond the limits of the currently operating Chandra and Newton observatories. Innovative optics technologies are therefore being developed and matured by the European Space Agency (ESA) in collaboration with research institutions and industry, enabling leading-edge future science missions. Silicon Pore Optics (SPO) [1 to 21] and Slumped Glass Optics (SGO) [22 to 29] are lightweight high performance X-ray optics technologies being developed in Europe, driven by applications in observatory class high energy astrophysics missions, aiming at angular resolutions of 5” and providing effective areas of one or more square meters at a few keV. This paper reports on the development activities led by ESA, and the status of the SPO and SGO technologies, including progress on high performance multilayer reflective coatings [30 to 35]. In addition, the progress with the X-ray test facilities and associated beam-lines is discussed [36].
    Optics for EUV, X-Ray, and Gamma-Ray Astronomy VI, San Diego; 08/2013
  • Solid-State Electronics. 01/2013;
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    ABSTRACT: In this paper, we present a review of experimental results examining charged defect components in the Al2O3/In0.53Ga0.47As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n- and p-type Al2O3/In0.53Ga0.47As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al2O3 thickness series (10-20 nm) for the n- and p-type In0.53Ga0.47As layers, the analysis reveals a positive fixed charge density ( ~ 9 ×1018 cm-3) distributed throughout the Al2O3 and a negative sheet charge density (- 8 × 1012 cm-2) located near the Al2O3/In0.53Ga0.47As interface. The interface state density integrated across the energy gap is ~1 ×1013 cm-2 and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5 % H2/ 95% N2 ambient at 350 °C for 30 minutes) annealing. The interface state distribution obtained from multi-frequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In0.53Ga0.47As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In0.53Ga0.47As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n- and p -type Al2O3/In- .53Ga0.47As MOS structures. Finally, this paper reviews recent work based on an optimization of the In0.53Ga0.47As surface preparation using (NH4)2S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al2O3, which indicates interface state reduction and genuine surface inversion for both n- and p -type Al2O3/In0.53Ga0.47As MOS structures.
    IEEE Transactions on Device and Materials Reliability 01/2013; 13(4):429-443. · 1.52 Impact Factor
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    ABSTRACT: Filamentary leakage current paths can occur in circular area Pt/HfO2/Pt capacitors as the result of severe electrical stress. The spatial distribution of these paths is investigated using 2D statistical methods. The filamentary paths are associated with important thermal effects occurring inside the HfO2 layer and manifest externally as a random spot pattern on the top Pt electrode. It is shown in this paper that for the devices with the largest areas significant departures from homogeneity are detected close to the peripheries of the structures. These deviations are observed as a lower density of spots than expected for a homogeneous Poisson process. Although the ultimate reason for this anomaly is still under investigation, our results demonstrate that the complete spatial randomness frequently assumed in oxide reliability analysis should not be taken for granted.
    Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures 01/2013; 31(1). · 1.36 Impact Factor
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    ABSTRACT: This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the oxide capacitance. These capacitors are prototypical of the type of gate oxide material stacks that could form equivalent metal–oxide–semiconductor field-effect transistors beyond the 32 nm technology node. The authors do not attempt to achieve the best scaled equivalent oxide thickness in this work, as our focus is on accurately extracting device properties that will allow the investigation and reduction of interface state defect densities at the high-k/III–V semiconductor interface. The operating voltage for future devices will be reduced, potentially leading to an associated reduction in the AC voltage amplitude, which will force a decrease in the signal-to-noise ratio of electrical responses and could therefore result in less accurate impedance measurements. A concern thus arises regarding the accuracy of the electrical property extractions using such impedance measurements for future d- vices, particularly in relation to the mid-gap interface state defect density estimated from the conductance method and from the combined high–low frequency capacitance–voltage method. The authors apply a fixed voltage step of 100 mV for all voltage sweep measurements at each AC frequency. Each of these measurements is repeated 15 times for the equidistant AC voltage amplitudes between 10 mV and 150 mV. This provides the desired AC voltage amplitude to step size ratios from 1:10 to 3:2. Our results indicate that, although the selection of the oxide capacitance is important both to the success and accuracy of the extraction method, the mid-gap interface state defect density extractions are not overly sensitive to the AC voltage amplitude employed regardless of what oxide capacitance is used in the extractions, particularly in the range from 50% below the voltage sweep step size to 50% above it. Therefore, the use of larger AC voltage amplitudes in this range to achieve a better signal-to-noise ratio during impedance measurements for future low operating voltage devices will not distort the extracted interface state defect density.
    Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures 01/2013; 31(1). · 1.36 Impact Factor
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    ABSTRACT: The growth of Cu films by atomic layer deposition using hydrogen plasma has been investigated. To obtain continuous films at sub 5 nm thicknesses the two dimensional coalescence of Cu nucleation sites formed at the start of the deposition process must be enhanced in preference to three dimensional island growth. Thermal energy reduction in the growth process is a key parameter. In this work hydrogen plasma is used to allow the reduction of the adsorbed precursor to metallic Cu at a range of low temperatures. Therefore, precursors can be compared at their low temperature limit, which is mainly determined by transport issues due to their relatively low vapor pressures. The structure of the deposited Cu films varies strongly with the substrate material used highlighting the importance of the nucleation mechanisms. On metallic substrates such as Ru and Pd continuous conductive thin films could be obtained, island formation and slow coalescence were observed on Si, TaN and CDO substrates even at temperatures low as 30 °C; therefore conductive films could only be obtained for relatively thick deposits.
    Surface and Coatings Technology 01/2013; 230:3 - 12. · 1.94 Impact Factor
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    Microelectronic Engineering 01/2013; · 1.22 Impact Factor
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    ABSTRACT: Novel processes were developed for fabricating silicon nanocrystals and nanocomposite materials which could be used as absorbers in third generation photovoltaic devices. A conventional high-temperature annealing technique was studied as a reference process, with some new insights in crystallisation mechanisms. Innovative methods for silicon nanocrystal synthesis at much lower temperature were demonstrated, namely chemical vapour deposition (CVD), physical vapour deposition (PVD) and aerosol-assisted CVD. Besides the advantage of low substrate temperature, these new techniques allow to fabricate silicon nanocrystals embedded in wide bandgap semiconductor host matrices, with a high density and a narrow size dispersion.
    physica status solidi (a) 10/2012; · 1.21 Impact Factor
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    ABSTRACT: Innovative X-ray ray imaging optic technologies, Silicon Pore Optics for example, are often characterised by large length to pore diameter aspect ratios. Such ratios present challenges to the deposition of reflectivity enhancing metallic coatings onto the mirror substrate surfaces. The technique of Atomic Layer Deposition (ALD) is perfectly suited to addressing this challenge due to the inherent self-limiting nature of the process which yields highly uniform coatings with surface roughness compatible with the requirements of high resolution X-ray imaging. We describe the results of a project aimed at developing an optimised ALD reactor and process to coat the internal wall surfaces of high aspect ratio samples with a uniform and smooth metallic layer. For sample substrates of aspect ratio ~100 the reactor has realised an average gradient of 1nm in the thickness of an Al2O3 coating on the internal walls of a 76 mm long glass tube.
    Proc SPIE 09/2012;
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    ABSTRACT: We investigated the effect of forming gas (5% $\hbox{H}_{2}/\hbox{95}\% \ \hbox{N}_{2}$) annealing on surface-channel $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ MOSFETs with atomic-layer-deposited $ \hbox{Al}_{2}\hbox{O}_{3}$ as the gate dielectric. We found that a forming gas anneal (FGA) at 300 $^{\circ}\hbox{C}$ for 30 min was efficient at removing or passivating positive fixed charges in $\hbox{Al}_{2}\hbox{O}_{3}$ , resulting in a shift of the threshold voltage from $-$0.63 to 0.43 V and in an increase in the $I_{\rm on}/I_{\rm off}$ ratio of three orders of magnitude. Following FGA, the MOSFETs exhibited a subthreshold swing of 150 mV/dec, and the peak transconductance, drive current, and peak effective mobility increased by 29%, 25%, and 15%, respectively. FGA significantly improved the source- or drain-to-substrate junction isolation, with a reduction of two orders of magnitude in the reverse bias leakage exhibited by the Si-implanted $ \hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}\ \hbox{n}^{+}/\hbox{p}$ junctions, which is consistent with passivation of midgap defects in $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ by the FGA process.
    IEEE Transactions on Electron Devices 04/2012; 59(4):1084-1090. · 2.06 Impact Factor

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