Proceedings of The International Symposium on Multiple-Valued Logic

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ISSN 0195-623X

Publications in this journal

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    ABSTRACT: The paper studies ternary logic functions that have decision diagrams of identical shape. The concept of beads, a special class of binary sequences, is extended to ternary sequences and are used to describe the shape of the decision diagrams representing functions that are mathematical models of such sequences. We point out that establishing the links between beads, functions, and their decision diagram representations can be useful in classification of ternary functions, checking the equivalence of functions, as well as their circuit implementations.
    43rd International Symposium on Mutiple-Valued Logic; 05/2013
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    ABSTRACT: Lifestyle diseases are strongly associated with lifestyle disease and the serious case of cardiovascular events which are main causes of long term nursing care. They would have strong impacts on the coming super aging society. In response to the problems to be solved, the notion technology of Systems Health Care and its technology have been proposed and developed by the authors to support health care in home and medical especially for lifestyle modification. In the framework, the important tools of Health Management Technology are investigated to be effective and efficient roles in the process of health management. The tools are Index, Criterion, and Causality which plays the roles in the health management functions of measurement, recognition, and estimation respectively. The applications are studied from the views of the tools; i.e., visceral fat and blood pressure are employed as the indices of vital signs and daily activities, sleep condition, and weight standing for diet as lifestyle habits.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This research work focuses on join operations and some lattice structures in BCK-algebras. As the main result, the authors introduce a new definition of a join operation on commutative BCK-algebra with condition (S) instead of the boundedness property.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: Reversible logic is an emerging research area that has shown promising results in applications such as quantum computing, low power design, and optical computing. Since the synthesis of minimal circuits is a cumbersome task, many synthesis algorithms apply heuristics and can therefore not provide a minimal solution. As a consequence, post synthesis methods such as window optimization and template matching are being applied. Template matching algorithms explore the circuits for gate cascades that can be replaced by smaller ones using a special class of identity circuits, so called templates. The determination of cascades applicable for substitution is the bottleneck of the template matching algorithm and problem-solving methods have been proposed in the recent past. Since these algorithms are based on heuristics, it cannot be ensured that a matching cascade can always be found. In this paper, we propose a new approach that determines matching cascades based on Boolean satisfiability and therefore ensures that these cascades are always found if they exist. Experimental results demonstrate that template matching yields smaller circuits when applying the new method for cascade determination.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: An 8-bit successive approximation analog-to-digital converter (SA ADC) has been designed and fabricated by using a 0.18-μm technology. A generalized non-binary algorithm has been used to enhance operation speed by relaxing the settling constraint of the DAC output. A split-capacitor array with a monotonic switching scheme has also been incorporated to reduce the power consumption. Transistor-level simulation shows an effective number of bits (ENOB) of 7.91 bits under a Nyquist condition with a sampling frequency of 2 MHz. Fabricated chip operates successfully, proving the design principle.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This study presents an efficient cluster-based tribes optimization algorithm (CTOA) to design neuro-fuzzy systems (NFS) for chaotic time series prediction. The proposed CTOA learning algorithm was used to parameter optimization of the NFS model. The CTOA adopts a self-clustering algorithm (SCA) to divide suitably a swarm into multiple tribes and uses different displacement strategies let each particle to select to update. Furthermore, the CTOA also utilizes adaptation mechanism to generate or remove particles and reconstruct tribal links to make the tribes to more adaption and improve the qualities of the tribes to evolve. Finally, the proposed NFS-CTOA method is applied to predict chaotic time series. Results of this study demonstrate the effectiveness of the proposed CTOA learning algorithm.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: Ternary logic has inherently the potential of high computational speed in comparison with conventional binary logic. A new low-transistor-count, high-speed ternary half adder is presented in this paper. Carbon nanotube field effect transistors are utilized to realize the new design methodology. Unique characteristics of this technology provide multi-Vt circuitry with the flexibility which is highly essential for MVL designs. The given structure also benefits from high driving power and capability of operating in low voltages. It has only 26 transistors. A new high-performance ternary full adder is also presented. Finally, the proposed adder cells are put together in order to construct a 4-bit ternary ripple adder.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: We study intersections of partial clones on the k-element set with k ≥ 2. More precisely we consider intersections of Slupecki partial clones with non-Slupecki maximal partial clones on k.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This paper proposes a human activity estimation system using a wearable multi-sensor with a built-in electrocardiograph and triaxial accelerometers. The multi-sensor unconstraintly measures biological information, and provides these data to personal computer by wireless communication. We estimate human activity in a series of activities by the biological information. In our experiment, the subjects have several activities such as "Walking", "Rest" and "Strength training". The system estimates these activities by a decision tree. Branch conditions of the decision tree are aided by fuzzy logic and state of activity transition from previous activity. Fuzzy membership functions are constructed from exercise intensity, distinction frequency and transitional probability. As the results, the proposed method estimated activities with good accuracy.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This paper shows that autocorrelation functions are useful to find the number of variables to represent incompletely specified index generation functions. It also shows a strategy to reduce the number of variables to represent incompletely specified index generation functions in the autocorrelation domain.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This paper considers the impact of address arithmetic in the Cooley-Tukey and the constant geometry fast algorithms for the Vilenkin-Chrestenson transform on their implementation for the graphics processing unit (GPU). We consider issues such as using different transform radices and analyze the number of GPU instructions and register usage in the OpenCL implementations of the considered algorithms. Further, we compare the program running times on the GPU and on the central processing unit (CPU). Experiments show that the GPU implementations are from 10 to 22 times faster than the C/C++ CPU implementations, depending on the transform radix and the number of variables in the processed function. The OpenCL implementation of the constant geometry algorithm translates into a lower number of GPU arithmetic and fetch instructions and uses less registers. This implementation requires up to 21% shorter processing times than the corresponding Cooley-Tukey algorithm implementation.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This paper proposes multi human location estimation system using four thermopile array sensors. These sensors are attached to the ceiling and acquire 8 × 8 place-dependent thermal distributions. Firstly, human area is detected by background removal with fuzzy inference based on human characteristics. Secondly, human areas are identified by Connected Component Labeling. Thirdly, label is checked to detect adjoining people. Finally, the number of people and their locations are estimated as the labels. In our experiment, we employed four adult persons and they performed four motion patterns. As the result, the system estimated the peoples successfully.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: Past methods for computation of the spectrum of a multiple-valued logic network usually rely on first characterizing the network in terms of a switching function, secondly in mapping the function values to complex numbers, and thirdly in performing the computation resulting in the spectrum. More recent approaches use decision diagram (DD) representations but still require initial formation of a DD representing the logic network switching function before the spectrum is computed. A method is described that derives a spectral transfer function directly from a netlist representation. The spectral transfer function can then be used to compute either the logic network spectral response for a specified input, or for computation of the entire Chrestenson spectrum. This method avoids the need for representing the network as a DD before computing the spectrum and can be used to directly compute either a single spectral response, the entire netlist spectrum, or the spectrum of subcircuits contained within a netlist.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: This paper presents a graph-based approach to designing arithmetic circuits over Galois fields (GFs) using normal basis representations. The proposed method is based on a graph-based circuit description called Galois-field Arithmetic Circuit Graph (GF-ACG). First, we extend GF-ACG to describe GFs represented by normal basis in addition to polynomial basis. We then apply the extended design method to Massey-Omura parallel multipliers which are well known as typical multipliers based on normal basis. We present the formal description in a hierarchical manner and show that the verification time is greatly reduced as compared with that of the conventional simulation technique. In addition, we design GF exponentiation circuits consisting of the Massey-Omura parallel multipliers and evaluate the performance in comparison with that of polynomial-basis multipliers.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
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    ABSTRACT: We present a new type of expressions called Event Expressions (EE), and diagrams called Event Diagrams (ED), that are used to describe robot behaviors (motions). These diagrams are very general and include operators from many known representations, such as Regular Expressions, Boolean and Fuzzy Logic plus many new operators. Most importantly, EDs create probability operator counterparts for all these deterministic operators. They can be used for event acceptance or event generation. The diagrams are intended to simulate robot controllers and verify their correctness and properties.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • Conference Paper: On Hyper Co-Clones
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    ABSTRACT: In this paper, we study closed sets of relations that are preserved by hyperoperations. We examine three already known Galois connections between hyperoperations and relations, and show that none of them induces a relational clone. We also introduce the notion of extended co-clone, and prove that there is a Galois connection (rPol, rInv) between extended hyperoperations on A and relations on non-void subsets of A with the property that rInv F is an extended co-clone. Moreover, we show that the three previously known classes of hyperclones can be defined by rPol.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013