Proceedings of The International Symposium on Multiple-Valued Logic

Journal description

Current impact factor: 0.00

Impact Factor Rankings

Additional details

5-year impact 0.00
Cited half-life 0.00
Immediacy index 0.00
Eigenfactor 0.00
Article influence 0.00
ISSN 0195-623X

Publications in this journal

  • [Show abstract] [Hide abstract]
    ABSTRACT: The paper studies ternary logic functions that have decision diagrams of identical shape. The concept of beads, a special class of binary sequences, is extended to ternary sequences and are used to describe the shape of the decision diagrams representing functions that are mathematical models of such sequences. We point out that establishing the links between beads, functions, and their decision diagram representations can be useful in classification of ternary functions, checking the equivalence of functions, as well as their circuit implementations.
    43rd International Symposium on Mutiple-Valued Logic; 05/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: This paper considers the impact of address arithmetic in the Cooley-Tukey and the constant geometry fast algorithms for the Vilenkin-Chrestenson transform on their implementation for the graphics processing unit (GPU). We consider issues such as using different transform radices and analyze the number of GPU instructions and register usage in the OpenCL implementations of the considered algorithms. Further, we compare the program running times on the GPU and on the central processing unit (CPU). Experiments show that the GPU implementations are from 10 to 22 times faster than the C/C++ CPU implementations, depending on the transform radix and the number of variables in the processed function. The OpenCL implementation of the constant geometry algorithm translates into a lower number of GPU arithmetic and fetch instructions and uses less registers. This implementation requires up to 21% shorter processing times than the corresponding Cooley-Tukey algorithm implementation.
    43rd IEEE Int. Symp. on Multiple-Valued Logic (ISMVL), Toyama, Japan; 05/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Lifestyle diseases are strongly associated with lifestyle disease and the serious case of cardiovascular events which are main causes of long term nursing care. They would have strong impacts on the coming super aging society. In response to the problems to be solved, the notion technology of Systems Health Care and its technology have been proposed and developed by the authors to support health care in home and medical especially for lifestyle modification. In the framework, the important tools of Health Management Technology are investigated to be effective and efficient roles in the process of health management. The tools are Index, Criterion, and Causality which plays the roles in the health management functions of measurement, recognition, and estimation respectively. The applications are studied from the views of the tools; i.e., visceral fat and blood pressure are employed as the indices of vital signs and daily activities, sleep condition, and weight standing for diet as lifestyle habits.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: A ferroelectric-based (FE-based) non-volatile logic is proposed for low-power LSI. Standby currents in a logic circuit can be cut off by using FE-based non-volatile flip-flops(NVFFs), and the standby power can be reduced to zero. The FE capacitor is accessed only when the power turns on/off, performance of the NVFF is almost as same as that of the conventional flip-flop in a logic operation. The use of complementarily stored data in coupled FE capacitors makes it possible to realize wide read voltage margin, which guarantees 10 years retention at 85 degree Celsius under less than 1.5V operation. The low supply voltage and electro-static discharge (ESD) detection technique prevents data destruction caused by illegal access for the FE capacitor during standby state. Applying the proposed circuitry in CPU, the write and read operation for all FE capacitors in 1.6k-bit NVFFs are performed within 7us and 3us with access energy of 23.1nJ and 8.1nJ, respectively, using 130nm CMOS with Pb(Zr, Ti)O3(PZT) thin films.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: This study presents an efficient cluster-based tribes optimization algorithm (CTOA) to design neuro-fuzzy systems (NFS) for chaotic time series prediction. The proposed CTOA learning algorithm was used to parameter optimization of the NFS model. The CTOA adopts a self-clustering algorithm (SCA) to divide suitably a swarm into multiple tribes and uses different displacement strategies let each particle to select to update. Furthermore, the CTOA also utilizes adaptation mechanism to generate or remove particles and reconstruct tribal links to make the tribes to more adaption and improve the qualities of the tribes to evolve. Finally, the proposed NFS-CTOA method is applied to predict chaotic time series. Results of this study demonstrate the effectiveness of the proposed CTOA learning algorithm.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • Conference Paper: On Hyper Co-clones
    [Show abstract] [Hide abstract]
    ABSTRACT: In this paper, we study closed sets of relations that are preserved by hyperoperations. We examine three already known Galois connections between hyperoperations and relations, and show that none of them induces a relational clone. We also introduce the notion of extended co-clone, and prove that there is a Galois connection (rPol, rInv) between extended hyperoperations on A and relations on non-void subsets of A with the property that rInv F is an extended co-clone. Moreover, we show that the three previously known classes of hyperclones can be defined by rPol.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: By establishing the relational theory of extendable partial clones on a finite set we describe infinite descending chains of partial clones whose intersection cannot be determined by a finite set of relations (we call them not finitely definable). A special type of such chains introduced in case of clones by I. Rosenberg (1972) as a generalization of two Post clones is investigated.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: This research work focuses on join operations and some lattice structures in BCK-algebras. As the main result, the authors introduce a new definition of a join operation on commutative BCK-algebra with condition (S) instead of the boundedness property.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Tolerance relations are useful in soft computing in the treatment of non-disjoint clusterings, in the study of fuzzy automata, etc. After a comparative review of tolerance and equivalences of a set, we evaluate the number of tolerances situated between two equivalences, certain combinatorial aspects of the lattice of tolerances on a finite set and the use of bipartite graphs in the study of tolerances.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: An 8-bit successive approximation analog-to-digital converter (SA ADC) has been designed and fabricated by using a 0.18-μm technology. A generalized non-binary algorithm has been used to enhance operation speed by relaxing the settling constraint of the DAC output. A split-capacitor array with a monotonic switching scheme has also been incorporated to reduce the power consumption. Transistor-level simulation shows an effective number of bits (ENOB) of 7.91 bits under a Nyquist condition with a sampling frequency of 2 MHz. Fabricated chip operates successfully, proving the design principle.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: We consider the set of equtional classes of finite functions endowed with the operation of class composition. Thus defined, this set gains a semigroup structure. This paper is a contribution to the understanding of this semigroup. We present several interesting properties of this semigroup. In particular, we show that it constitutes a topological semigroup that is profinite.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: A decomposed multi-terminal multi-valued decision diagrams for characteristic function(MTMDDs for CF) represents decomposed circuits. It can represent complex functions compactly. This paper shows a machine that evaluates decision diagrams. First, we introduce the decomposed MTMDDs for CF. Then, we consider two instructions to evaluate the decomposed MTMDDs for CF. Next, we show a machine that evaluates the decision diagrams. We compare that machine with embedded processors. As for the power-delay product, our machine running at 100 MHz is 60.84 times smaller than Nios II processor running at 100 MHz, and it is 18.66 times smaller than Atom N455 processor running at 1.67 GHz.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Reversible circuits are an attractive computation alternative as they build the basis for many emerging technologies such as quantum computation or low power design. Since first physical realizations of reversible circuits have already been presented in the past, how to efficiently test such circuits became a current research topic. Consequently, several approaches for Automatic Test Pattern Generation (ATPG) have been presented in the past. However, the order in which the respective faults are targeted has a significant effect on the resulting test size. While determining good fault orderings has intensely been considered for the test of conventional circuits, according strategies for reversible circuits have not been evaluated yet. This is done in this paper. To this end, a fault ordering scheme is presented that explicitly exploits the reversibility of the underlying circuits. Experimental results show that the proposed scheme leads to improvements of up to 65% in the size of the testset.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: In hardware implementations of cryptographic systems, secret keys are commonly stored in an on-chip memory. This makes them prone to physical attacks, since the location of a memory on a chip in usually easy to spot. We propose to encode secret keys using a state machine which can be concealed in the rest of the logic on a chip. We present an heuristic algorithm which constructs a minimal state machine for a given set of secret keys. We show that, by using m-ary encoding, we are able to construct state machines which are smaller than the ones constructed using binary encoding. The presented algorithm is feasible for storing up to 1 Mbits of random data.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013
  • [Show abstract] [Hide abstract]
    ABSTRACT: Mulholland inequality is a real functional inequality presented in 1950 in a paper by Mulholland as a generalization of the Minkowski inequality. In his paper, Mulholland has also provided a sufficient condition for the inequality to be satisfied. However, until now, it has remained an open problem whether this sufficient condition is also necessary. This paper investigates a geometric interpretation of Mulholland inequality and offers a class of functions satisfying the inequality which is strictly larger compared to the class delimited by the Mulholland's condition. Thus, it is proven that the condition is not necessary.
    Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on; 01/2013